
Ronald Lance Reidlinger
Examiner (ID: 7236, Phone: (571)270-7353 , Office: P/2824 )
| Most Active Art Unit | 2824 |
| Art Unit(s) | 4134, 2824 |
| Total Applications | 515 |
| Issued Applications | 439 |
| Pending Applications | 0 |
| Abandoned Applications | 77 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 9924682
[patent_doc_number] => 08982656
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-03-17
[patent_title] => 'Non-volatile semiconductor memory device and semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 14/168759
[patent_app_country] => US
[patent_app_date] => 2014-01-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 12
[patent_no_of_words] => 4212
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 220
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14168759
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/168759 | Non-volatile semiconductor memory device and semiconductor device | Jan 29, 2014 | Issued |
Array
(
[id] => 11796514
[patent_doc_number] => 09406357
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-08-02
[patent_title] => 'Data capture system and method, and memory controllers and devices'
[patent_app_type] => utility
[patent_app_number] => 14/148488
[patent_app_country] => US
[patent_app_date] => 2014-01-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 3433
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 72
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14148488
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/148488 | Data capture system and method, and memory controllers and devices | Jan 5, 2014 | Issued |
Array
(
[id] => 9609898
[patent_doc_number] => 08787078
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-07-22
[patent_title] => 'Method and apparatus for reducing read disturb in memory'
[patent_app_type] => utility
[patent_app_number] => 14/105920
[patent_app_country] => US
[patent_app_date] => 2013-12-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 4713
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 239
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14105920
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/105920 | Method and apparatus for reducing read disturb in memory | Dec 12, 2013 | Issued |
Array
(
[id] => 9382496
[patent_doc_number] => 20140085977
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-03-27
[patent_title] => 'SEMICONDUCTOR MEMORY DEVICE WITH MEMORY CELLS EACH INCLUDING A CHARGE ACCUMULATION LAYER AND A CONTROL GATE'
[patent_app_type] => utility
[patent_app_number] => 14/098058
[patent_app_country] => US
[patent_app_date] => 2013-12-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 9205
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14098058
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/098058 | Semiconductor memory device with memory cells each including a charge accumulation layer and a control gate | Dec 4, 2013 | Issued |
Array
(
[id] => 10138288
[patent_doc_number] => 09171609
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-10-27
[patent_title] => 'Address transition detecting circuit'
[patent_app_type] => utility
[patent_app_number] => 14/096023
[patent_app_country] => US
[patent_app_date] => 2013-12-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 18
[patent_no_of_words] => 8840
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 899
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14096023
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/096023 | Address transition detecting circuit | Dec 3, 2013 | Issued |
Array
(
[id] => 10547756
[patent_doc_number] => 09272357
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-03-01
[patent_title] => 'Systems and methods for wire feed speed control'
[patent_app_type] => utility
[patent_app_number] => 14/066192
[patent_app_country] => US
[patent_app_date] => 2013-10-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3664
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 101
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14066192
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/066192 | Systems and methods for wire feed speed control | Oct 28, 2013 | Issued |
Array
(
[id] => 9591060
[patent_doc_number] => 08780613
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2014-07-15
[patent_title] => 'Reading a memory element within a crossbar array'
[patent_app_type] => utility
[patent_app_number] => 14/048521
[patent_app_country] => US
[patent_app_date] => 2013-10-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 4411
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 88
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14048521
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/048521 | Reading a memory element within a crossbar array | Oct 7, 2013 | Issued |
Array
(
[id] => 10099681
[patent_doc_number] => 09135996
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-09-15
[patent_title] => 'Variable resistance memory device and related method of operation'
[patent_app_type] => utility
[patent_app_number] => 14/047626
[patent_app_country] => US
[patent_app_date] => 2013-10-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 26
[patent_no_of_words] => 7937
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 86
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14047626
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/047626 | Variable resistance memory device and related method of operation | Oct 6, 2013 | Issued |
Array
(
[id] => 9292979
[patent_doc_number] => 20140036613
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-02-06
[patent_title] => 'SEMICONDUCTOR INTEGRATED CIRCUIT'
[patent_app_type] => utility
[patent_app_number] => 14/044861
[patent_app_country] => US
[patent_app_date] => 2013-10-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 7157
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14044861
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/044861 | Semiconductor integrated circuit | Oct 1, 2013 | Issued |
Array
(
[id] => 10015881
[patent_doc_number] => 09058902
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-06-16
[patent_title] => 'Method of detecting transistors mismatch in a SRAM cell'
[patent_app_type] => utility
[patent_app_number] => 14/040733
[patent_app_country] => US
[patent_app_date] => 2013-09-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 2791
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 397
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14040733
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/040733 | Method of detecting transistors mismatch in a SRAM cell | Sep 29, 2013 | Issued |
Array
(
[id] => 10131843
[patent_doc_number] => 09165683
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-10-20
[patent_title] => 'Multi-word line erratic programming detection'
[patent_app_type] => utility
[patent_app_number] => 14/033727
[patent_app_country] => US
[patent_app_date] => 2013-09-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 45
[patent_figures_cnt] => 57
[patent_no_of_words] => 33688
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 271
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14033727
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/033727 | Multi-word line erratic programming detection | Sep 22, 2013 | Issued |
Array
(
[id] => 9337108
[patent_doc_number] => 20140063890
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-03-06
[patent_title] => 'SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 14/018885
[patent_app_country] => US
[patent_app_date] => 2013-09-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 53
[patent_figures_cnt] => 53
[patent_no_of_words] => 17084
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14018885
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/018885 | Semiconductor device | Sep 4, 2013 | Issued |
Array
(
[id] => 9755374
[patent_doc_number] => 20140286075
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-09-25
[patent_title] => 'RESISTANCE CHANGE MEMORY'
[patent_app_type] => utility
[patent_app_number] => 14/018287
[patent_app_country] => US
[patent_app_date] => 2013-09-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 18
[patent_no_of_words] => 6762
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14018287
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/018287 | Resistance change memory | Sep 3, 2013 | Issued |
Array
(
[id] => 9907850
[patent_doc_number] => 20150063051
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-03-05
[patent_title] => 'LOW POWER PROTECTION CIRCUIT'
[patent_app_type] => utility
[patent_app_number] => 14/014397
[patent_app_country] => US
[patent_app_date] => 2013-08-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3014
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14014397
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/014397 | Low power protection circuit | Aug 29, 2013 | Issued |
Array
(
[id] => 9845991
[patent_doc_number] => 08947918
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-02-03
[patent_title] => 'Semiconductor memory device'
[patent_app_type] => utility
[patent_app_number] => 14/014231
[patent_app_country] => US
[patent_app_date] => 2013-08-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 6247
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 170
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14014231
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/014231 | Semiconductor memory device | Aug 28, 2013 | Issued |
Array
(
[id] => 10937948
[patent_doc_number] => 20140340969
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-11-20
[patent_title] => 'SEMICONDUCTOR APPARATUS'
[patent_app_type] => utility
[patent_app_number] => 13/974497
[patent_app_country] => US
[patent_app_date] => 2013-08-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 4987
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13974497
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/974497 | Semiconductor apparatus | Aug 22, 2013 | Issued |
Array
(
[id] => 9640893
[patent_doc_number] => 20140219004
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-08-07
[patent_title] => 'NONVOLATILE SEMICONDUCTOR MEMORY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 13/969835
[patent_app_country] => US
[patent_app_date] => 2013-08-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 6807
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13969835
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/969835 | Resistance changing memory with a first driver closer than a second driver | Aug 18, 2013 | Issued |
Array
(
[id] => 9845999
[patent_doc_number] => 08947926
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-02-03
[patent_title] => 'Semiconductor stack incorporating phase change material'
[patent_app_type] => utility
[patent_app_number] => 13/967411
[patent_app_country] => US
[patent_app_date] => 2013-08-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 5976
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 140
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13967411
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/967411 | Semiconductor stack incorporating phase change material | Aug 14, 2013 | Issued |
Array
(
[id] => 9292939
[patent_doc_number] => 20140036573
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-02-06
[patent_title] => 'SEMICONDUCTOR MEMORY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 13/959267
[patent_app_country] => US
[patent_app_date] => 2013-08-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 9726
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13959267
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/959267 | Semiconductor memory device | Aug 4, 2013 | Issued |
Array
(
[id] => 9173016
[patent_doc_number] => 20130315001
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-11-28
[patent_title] => 'SEMICONDUCTOR MEMORY COLUMN DECODER DEVICE AND METHOD'
[patent_app_type] => utility
[patent_app_number] => 13/957377
[patent_app_country] => US
[patent_app_date] => 2013-08-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 24
[patent_figures_cnt] => 24
[patent_no_of_words] => 9524
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13957377
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/957377 | Semiconductor memory column decoder device and method | Jul 31, 2013 | Issued |