![](/images/general/no_picture/200_user.png)
Ronnie Kirby Jordan
Examiner (ID: 4379)
Most Active Art Unit | 1747 |
Art Unit(s) | 1747, 4146 |
Total Applications | 116 |
Issued Applications | 43 |
Pending Applications | 52 |
Abandoned Applications | 21 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 18593764
[patent_doc_number] => 11742678
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-08-29
[patent_title] => System and a method for indicating information representing battery status of an electronic device
[patent_app_type] => utility
[patent_app_number] => 17/380907
[patent_app_country] => US
[patent_app_date] => 2021-07-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 4897
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 91
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17380907
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/380907 | System and a method for indicating information representing battery status of an electronic device | Jul 19, 2021 | Issued |
Array
(
[id] => 19167694
[patent_doc_number] => 11983603
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-05-14
[patent_title] => Holder, quantum device, and manufacturing method of quantum device
[patent_app_type] => utility
[patent_app_number] => 17/375943
[patent_app_country] => US
[patent_app_date] => 2021-07-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 8267
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 114
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17375943
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/375943 | Holder, quantum device, and manufacturing method of quantum device | Jul 13, 2021 | Issued |
Array
(
[id] => 17187561
[patent_doc_number] => 20210334446
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-10-28
[patent_title] => INTEGRATED CIRCUIT INCLUDING MISALIGNED ISOLATION PORTIONS
[patent_app_type] => utility
[patent_app_number] => 17/365897
[patent_app_country] => US
[patent_app_date] => 2021-07-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12216
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 110
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17365897
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/365897 | Integrated circuit including misaligned isolation portions | Jun 30, 2021 | Issued |
Array
(
[id] => 18592385
[patent_doc_number] => 11741285
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-08-29
[patent_title] => Semiconductor device and method of manufacturing the same
[patent_app_type] => utility
[patent_app_number] => 17/361854
[patent_app_country] => US
[patent_app_date] => 2021-06-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 33
[patent_figures_cnt] => 33
[patent_no_of_words] => 17567
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 346
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17361854
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/361854 | Semiconductor device and method of manufacturing the same | Jun 28, 2021 | Issued |
Array
(
[id] => 18827976
[patent_doc_number] => 11843269
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-12-12
[patent_title] => Apparatuses and methods for removing defective energy storage cells from an energy storage array
[patent_app_type] => utility
[patent_app_number] => 17/361256
[patent_app_country] => US
[patent_app_date] => 2021-06-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3969
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 88
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17361256
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/361256 | Apparatuses and methods for removing defective energy storage cells from an energy storage array | Jun 27, 2021 | Issued |
Array
(
[id] => 17159458
[patent_doc_number] => 20210320509
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-10-14
[patent_title] => BATTERY MANAGEMENT SYSTEM
[patent_app_type] => utility
[patent_app_number] => 17/358476
[patent_app_country] => US
[patent_app_date] => 2021-06-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9789
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -14
[patent_words_short_claim] => 70
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17358476
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/358476 | Battery management system | Jun 24, 2021 | Issued |
Array
(
[id] => 18561933
[patent_doc_number] => 11727179
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-08-15
[patent_title] => Transmission path design assistance system, transmission path design assistance method, and computer readable medium storing transmission path design assistance program
[patent_app_type] => utility
[patent_app_number] => 17/356896
[patent_app_country] => US
[patent_app_date] => 2021-06-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 4712
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 95
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17356896
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/356896 | Transmission path design assistance system, transmission path design assistance method, and computer readable medium storing transmission path design assistance program | Jun 23, 2021 | Issued |
Array
(
[id] => 17317386
[patent_doc_number] => 20210406435
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-12-30
[patent_title] => SYSTEM, METHOD, AND COMPUTER-ACCESSIBLE MEDIUM FOR ABSORPTION BASED LOGIC LOCKING
[patent_app_type] => utility
[patent_app_number] => 17/357415
[patent_app_country] => US
[patent_app_date] => 2021-06-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8029
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 73
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17357415
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/357415 | SYSTEM, METHOD, AND COMPUTER-ACCESSIBLE MEDIUM FOR ABSORPTION BASED LOGIC LOCKING | Jun 23, 2021 | Abandoned |
Array
(
[id] => 17313838
[patent_doc_number] => 20210402886
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-12-30
[patent_title] => METHOD FOR REPOSITIONING A POWER RECEIVING COIL OF A VEHICLE
[patent_app_type] => utility
[patent_app_number] => 17/354828
[patent_app_country] => US
[patent_app_date] => 2021-06-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6682
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -13
[patent_words_short_claim] => 103
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17354828
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/354828 | METHOD FOR REPOSITIONING A POWER RECEIVING COIL OF A VEHICLE | Jun 21, 2021 | Pending |
Array
(
[id] => 17263646
[patent_doc_number] => 20210376631
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-12-02
[patent_title] => BATTERY ASSEMBLY, ELECTRONIC DEVICE, AND BATTERY DETECTION SYSTEM
[patent_app_type] => utility
[patent_app_number] => 17/353738
[patent_app_country] => US
[patent_app_date] => 2021-06-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10944
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -13
[patent_words_short_claim] => 114
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17353738
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/353738 | BATTERY ASSEMBLY, ELECTRONIC DEVICE, AND BATTERY DETECTION SYSTEM | Jun 20, 2021 | Pending |
Array
(
[id] => 17145807
[patent_doc_number] => 20210313820
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-10-07
[patent_title] => CHARGING METHOD AND DEVICE, DEVICE TO BE CHARGED, STORAGE MEDIUM, AND CHIP SYSTEM
[patent_app_type] => utility
[patent_app_number] => 17/351229
[patent_app_country] => US
[patent_app_date] => 2021-06-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 15433
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 87
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17351229
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/351229 | CHARGING METHOD AND DEVICE, DEVICE TO BE CHARGED, STORAGE MEDIUM, AND CHIP SYSTEM | Jun 17, 2021 | Pending |
Array
(
[id] => 18506649
[patent_doc_number] => 11704467
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-07-18
[patent_title] => Automated balanced global clock tree synthesis in multi level physical hierarchy
[patent_app_type] => utility
[patent_app_number] => 17/349400
[patent_app_country] => US
[patent_app_date] => 2021-06-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 5197
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 116
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17349400
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/349400 | Automated balanced global clock tree synthesis in multi level physical hierarchy | Jun 15, 2021 | Issued |
Array
(
[id] => 17294402
[patent_doc_number] => 20210390241
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-12-16
[patent_title] => FAST TOPOLOGY BUS ROUTER FOR INTERCONNECT PLANNING
[patent_app_type] => utility
[patent_app_number] => 17/345878
[patent_app_country] => US
[patent_app_date] => 2021-06-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7570
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 71
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17345878
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/345878 | Fast topology bus router for interconnect planning | Jun 10, 2021 | Issued |
Array
(
[id] => 18506642
[patent_doc_number] => 11704460
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-07-18
[patent_title] => System and method for fast and accurate netlist to RTL reverse engineering
[patent_app_type] => utility
[patent_app_number] => 17/343231
[patent_app_country] => US
[patent_app_date] => 2021-06-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 6164
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 154
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17343231
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/343231 | System and method for fast and accurate netlist to RTL reverse engineering | Jun 8, 2021 | Issued |
Array
(
[id] => 18087637
[patent_doc_number] => 11537774
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-12-27
[patent_title] => Optimized reconfiguration algorithm based on dynamic voltage and frequency scaling
[patent_app_type] => utility
[patent_app_number] => 17/595194
[patent_app_country] => US
[patent_app_date] => 2021-06-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 1
[patent_no_of_words] => 3411
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 337
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17595194
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/595194 | Optimized reconfiguration algorithm based on dynamic voltage and frequency scaling | Jun 8, 2021 | Issued |
Array
(
[id] => 18234615
[patent_doc_number] => 11599172
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-03-07
[patent_title] => Electronic device, method of controlling charging by electronic device, and method of supplying power by power supply device
[patent_app_type] => utility
[patent_app_number] => 17/341887
[patent_app_country] => US
[patent_app_date] => 2021-06-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 17337
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 176
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17341887
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/341887 | Electronic device, method of controlling charging by electronic device, and method of supplying power by power supply device | Jun 7, 2021 | Issued |
Array
(
[id] => 18454707
[patent_doc_number] => 20230195987
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-06-22
[patent_title] => STANDARD UNIT FOR SYSTEM ON CHIP DESIGN, AND DATA PROCESSING UNIT, OPERATION CHIP AND COMPUTING APPARATUS USING SAME
[patent_app_type] => utility
[patent_app_number] => 17/997319
[patent_app_country] => US
[patent_app_date] => 2021-06-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6131
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -8
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17997319
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/997319 | Standard unit for system on chip design, and data processing unit, operation chip and computing apparatus using same | Jun 7, 2021 | Issued |
Array
(
[id] => 18705127
[patent_doc_number] => 11791647
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-10-17
[patent_title] => Method and circuitry to adaptively charge a battery/cell
[patent_app_type] => utility
[patent_app_number] => 17/303760
[patent_app_country] => US
[patent_app_date] => 2021-06-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 54
[patent_no_of_words] => 16989
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 134
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17303760
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/303760 | Method and circuitry to adaptively charge a battery/cell | Jun 6, 2021 | Issued |
Array
(
[id] => 18622753
[patent_doc_number] => 11755798
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-09-12
[patent_title] => Logic circuits with reduced transistor counts
[patent_app_type] => utility
[patent_app_number] => 17/340662
[patent_app_country] => US
[patent_app_date] => 2021-06-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 26
[patent_no_of_words] => 16743
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 179
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17340662
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/340662 | Logic circuits with reduced transistor counts | Jun 6, 2021 | Issued |
Array
(
[id] => 18703627
[patent_doc_number] => 11790141
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-10-17
[patent_title] => Systems and methods for designing integrated circuits
[patent_app_type] => utility
[patent_app_number] => 17/336916
[patent_app_country] => US
[patent_app_date] => 2021-06-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 67
[patent_figures_cnt] => 107
[patent_no_of_words] => 21115
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 110
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17336916
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/336916 | Systems and methods for designing integrated circuits | Jun 1, 2021 | Issued |