Roy Karl Potter

Array ( [id] => 3511230 [patent_doc_number] => 05569955 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-10-29 [patent_title] => 'High density integrated circuit assembly combining leadframe leads with conductive traces' [patent_app_type] => 1 [patent_app_number] => 8/406726 [patent_app_country] => US [patent_app_date] => 1995-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 4085 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/569/05569955.pdf [firstpage_image] =>[orig_patent_app_number] => 406726 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3575367 [patent_doc_number] => 05539218 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-07-23 [patent_title] => 'Semiconductor device and resin for sealing a semiconductor device' [patent_app_type] => 1 [patent_app_number] => 8/406058 [patent_app_country] => US [patent_app_date] => 1995-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3688 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/539/05539218.pdf [firstpage_image] =>[orig_patent_app_number] => 406058 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3830368 [patent_doc_number] => 05731630 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-03-24 [patent_title] => 'Tape carrier for increasing the number of terminals between the tape carrier and a substrate' [patent_app_type] => 1 [patent_app_number] => 8/403626 [patent_app_country] => US [patent_app_date] => 1995-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 3316 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/731/05731630.pdf [firstpage_image] =>[orig_patent_app_number] => 403626 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3496367 [patent_doc_number] => 05536961 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-07-16 [patent_title] => 'High breakdown voltage semiconductor device' [patent_app_type] => 1 [patent_app_number] => 8/396794 [patent_app_country] => US [patent_app_date] => 1995-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 65 [patent_figures_cnt] => 129 [patent_no_of_words] => 12400 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/536/05536961.pdf [firstpage_image] =>[orig_patent_app_number] => 396794 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3837333 [patent_doc_number] => 05814890 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-29 [patent_title] => 'Thin-type semiconductor package' [patent_app_type] => 1 [patent_app_number] => 8/396234 [patent_app_country] => US [patent_app_date] => 1995-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 13 [patent_no_of_words] => 4552 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 241 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/814/05814890.pdf [firstpage_image] =>[orig_patent_app_number] => 396234 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3629007 [patent_doc_number] => 05608262 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-03-04 [patent_title] => 'Packaging multi-chip modules without wire-bond interconnection' [patent_app_type] => 1 [patent_app_number] => 8/393628 [patent_app_country] => US [patent_app_date] => 1995-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 3976 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/608/05608262.pdf [firstpage_image] =>[orig_patent_app_number] => 393628 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3652217 [patent_doc_number] => 05629564 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-05-13 [patent_title] => 'Electroplated solder terminal' [patent_app_type] => 1 [patent_app_number] => 8/392718 [patent_app_country] => US [patent_app_date] => 1995-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 5795 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/629/05629564.pdf [firstpage_image] =>[orig_patent_app_number] => 392718 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3548792 [patent_doc_number] => 05554886 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-09-10 [patent_title] => 'Lead frame and semiconductor package with such lead frame' [patent_app_type] => 1 [patent_app_number] => 8/384988 [patent_app_country] => US [patent_app_date] => 1995-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 4850 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/554/05554886.pdf [firstpage_image] =>[orig_patent_app_number] => 384988 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3529206 [patent_doc_number] => 05528076 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-06-18 [patent_title] => 'Leadframe having metal impregnated silicon carbide mounting area' [patent_app_type] => 1 [patent_app_number] => 8/382102 [patent_app_country] => US [patent_app_date] => 1995-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2452 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 41 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/528/05528076.pdf [firstpage_image] =>[orig_patent_app_number] => 382102 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3882837 [patent_doc_number] => 05804870 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-08 [patent_title] => 'Hermetically sealed integrated circuit lead-on package configuration' [patent_app_type] => 1 [patent_app_number] => 8/380541 [patent_app_country] => US [patent_app_date] => 1995-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 29 [patent_no_of_words] => 7165 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 231 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/804/05804870.pdf [firstpage_image] =>[orig_patent_app_number] => 380541 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3741101 [patent_doc_number] => 05698895 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-12-16 [patent_title] => 'Silicon segment programming method and apparatus' [patent_app_type] => 1 [patent_app_number] => 8/376149 [patent_app_country] => US [patent_app_date] => 1995-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 5827 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/698/05698895.pdf [firstpage_image] =>[orig_patent_app_number] => 376149 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3529192 [patent_doc_number] => 05528075 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-06-18 [patent_title] => 'Lead-on-chip integrated circuit apparatus' [patent_app_type] => 1 [patent_app_number] => 8/375874 [patent_app_country] => US [patent_app_date] => 1995-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 25 [patent_no_of_words] => 8640 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/528/05528075.pdf [firstpage_image] =>[orig_patent_app_number] => 375874 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3735104 [patent_doc_number] => 05635756 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-06-03 [patent_title] => 'Semiconductor device, lead frame therefor and memory card to provide a thin structure' [patent_app_type] => 1 [patent_app_number] => 8/369486 [patent_app_country] => US [patent_app_date] => 1995-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 46 [patent_no_of_words] => 9847 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 41 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/635/05635756.pdf [firstpage_image] =>[orig_patent_app_number] => 369486 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3554552 [patent_doc_number] => 05572066 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-11-05 [patent_title] => 'Lead-on-chip semiconductor device and method for its fabrication' [patent_app_type] => 1 [patent_app_number] => 8/368506 [patent_app_country] => US [patent_app_date] => 1995-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 1761 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/572/05572066.pdf [firstpage_image] =>[orig_patent_app_number] => 368506 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4351247 [patent_doc_number] => 06285082 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-04 [patent_title] => 'Soft metal conductor' [patent_app_type] => 1 [patent_app_number] => 8/367565 [patent_app_country] => US [patent_app_date] => 1995-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 4013 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/285/06285082.pdf [firstpage_image] =>[orig_patent_app_number] => 367565 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3628978 [patent_doc_number] => 05608260 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-03-04 [patent_title] => 'Leadframe having contact pads defined by a polymer insulating film' [patent_app_type] => 1 [patent_app_number] => 8/366633 [patent_app_country] => US [patent_app_date] => 1994-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 2232 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/608/05608260.pdf [firstpage_image] =>[orig_patent_app_number] => 366633 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3544054 [patent_doc_number] => 05481133 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-01-02 [patent_title] => 'Three-dimensional multichip package' [patent_app_type] => 1 [patent_app_number] => 8/368144 [patent_app_country] => US [patent_app_date] => 1994-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 2026 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 258 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/481/05481133.pdf [firstpage_image] =>[orig_patent_app_number] => 368144 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3628991 [patent_doc_number] => 05608261 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-03-04 [patent_title] => 'High performance and high capacitance package with improved thermal dissipation' [patent_app_type] => 1 [patent_app_number] => 8/367442 [patent_app_country] => US [patent_app_date] => 1994-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3797 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/608/05608261.pdf [firstpage_image] =>[orig_patent_app_number] => 367442 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3602858 [patent_doc_number] => 05559365 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-09-24 [patent_title] => 'Semiconductor device including a plurality of leads each having two end portions extending downward and upward' [patent_app_type] => 1 [patent_app_number] => 8/365226 [patent_app_country] => US [patent_app_date] => 1994-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 14 [patent_no_of_words] => 3099 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/559/05559365.pdf [firstpage_image] =>[orig_patent_app_number] => 365226 [rel_patent_id] =>[rel_patent_doc_number] =>)