
Roy Karl Potter
Examiner (ID: 13991, Phone: (571)272-1842 , Office: P/2822 )
| Most Active Art Unit | 2822 |
| Art Unit(s) | 2822, 2508, 2811, 3621 |
| Total Applications | 2584 |
| Issued Applications | 2409 |
| Pending Applications | 46 |
| Abandoned Applications | 141 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 10145105
[patent_doc_number] => 09177919
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-11-03
[patent_title] => 'Chip package and method for forming the same'
[patent_app_type] => utility
[patent_app_number] => 14/540460
[patent_app_country] => US
[patent_app_date] => 2014-11-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 17
[patent_no_of_words] => 5600
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 104
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14540460
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/540460 | Chip package and method for forming the same | Nov 12, 2014 | Issued |
Array
(
[id] => 10245045
[patent_doc_number] => 20150130041
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-05-14
[patent_title] => 'SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 14/534607
[patent_app_country] => US
[patent_app_date] => 2014-11-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 5457
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14534607
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/534607 | Semiconductor package and method of fabricating the same | Nov 5, 2014 | Issued |
Array
(
[id] => 10294556
[patent_doc_number] => 20150179556
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-06-25
[patent_title] => 'SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 14/533064
[patent_app_country] => US
[patent_app_date] => 2014-11-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 4042
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14533064
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/533064 | Semiconductor package and method of manufacturing the same | Nov 3, 2014 | Issued |
Array
(
[id] => 11057349
[patent_doc_number] => 20160254311
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-09-01
[patent_title] => 'DIGITAL DETECTOR POSSESSING A GENERATOR OF LIGHT ENABLING OPTICAL WIPING'
[patent_app_type] => utility
[patent_app_number] => 15/033025
[patent_app_country] => US
[patent_app_date] => 2014-11-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 6440
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15033025
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/033025 | Digital detector possessing a generator of light enabling optical wiping | Nov 3, 2014 | Issued |
Array
(
[id] => 10277277
[patent_doc_number] => 20150162274
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-06-11
[patent_title] => 'SEMICONDUCTOR APPARATUS'
[patent_app_type] => utility
[patent_app_number] => 14/528383
[patent_app_country] => US
[patent_app_date] => 2014-10-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 17
[patent_no_of_words] => 10941
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14528383
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/528383 | Semiconductor apparatus | Oct 29, 2014 | Issued |
Array
(
[id] => 9898945
[patent_doc_number] => 20150054144
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-02-26
[patent_title] => 'SEMICONDUCTOR PACKAGE INCLUDING MULTIPLE CHIPS AND SEPARATE GROUPS OF LEADS'
[patent_app_type] => utility
[patent_app_number] => 14/528572
[patent_app_country] => US
[patent_app_date] => 2014-10-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 26
[patent_figures_cnt] => 26
[patent_no_of_words] => 10662
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14528572
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/528572 | Semiconductor package including multiple chips and separate groups of leads | Oct 29, 2014 | Issued |
Array
(
[id] => 10557054
[patent_doc_number] => 09281258
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2016-03-08
[patent_title] => 'Chip scale packages and related methods'
[patent_app_type] => utility
[patent_app_number] => 14/528106
[patent_app_country] => US
[patent_app_date] => 2014-10-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 27
[patent_no_of_words] => 7527
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 202
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14528106
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/528106 | Chip scale packages and related methods | Oct 29, 2014 | Issued |
Array
(
[id] => 10238297
[patent_doc_number] => 20150123292
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-05-07
[patent_title] => 'SEMICONDUCTOR DEVICE CONNECTED BY ANISOTROPIC CONDUCTIVE FILM'
[patent_app_type] => utility
[patent_app_number] => 14/527181
[patent_app_country] => US
[patent_app_date] => 2014-10-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 9540
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14527181
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/527181 | Semiconductor device connected by anisotropic conductive film | Oct 28, 2014 | Issued |
Array
(
[id] => 11087861
[patent_doc_number] => 20160284829
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-09-29
[patent_title] => 'FAULT TOLERANT DESIGN FOR LARGE AREA NITRIDE SEMICONDUCTOR DEVICES'
[patent_app_type] => utility
[patent_app_number] => 15/032824
[patent_app_country] => US
[patent_app_date] => 2014-10-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 12010
[patent_no_of_claims] => 29
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15032824
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/032824 | Fault tolerant design for large area nitride semiconductor devices | Oct 27, 2014 | Issued |
Array
(
[id] => 11187554
[patent_doc_number] => 09418965
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2016-08-16
[patent_title] => 'Embedded interposer with through-hole vias'
[patent_app_type] => utility
[patent_app_number] => 14/524732
[patent_app_country] => US
[patent_app_date] => 2014-10-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 8
[patent_no_of_words] => 3548
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 85
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14524732
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/524732 | Embedded interposer with through-hole vias | Oct 26, 2014 | Issued |
Array
(
[id] => 10230430
[patent_doc_number] => 20150115424
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-04-30
[patent_title] => 'ELECTRONIC SYSTEM COMPRISING STACKED ELECTRONIC DEVICES PROVIDED WITH INTEGRATED-CIRCUIT CHIPS'
[patent_app_type] => utility
[patent_app_number] => 14/524906
[patent_app_country] => US
[patent_app_date] => 2014-10-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 2358
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14524906
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/524906 | Electronic system comprising stacked electronic devices provided with integrated-circuit chips | Oct 26, 2014 | Issued |
Array
(
[id] => 11898117
[patent_doc_number] => 09768056
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-09-19
[patent_title] => 'Method of manufacturing high resistivity SOI wafers with charge trapping layers based on terminated Si deposition'
[patent_app_type] => utility
[patent_app_number] => 14/524693
[patent_app_country] => US
[patent_app_date] => 2014-10-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 9886
[patent_no_of_claims] => 57
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 216
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14524693
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/524693 | Method of manufacturing high resistivity SOI wafers with charge trapping layers based on terminated Si deposition | Oct 26, 2014 | Issued |
Array
(
[id] => 10060088
[patent_doc_number] => 09099452
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-08-04
[patent_title] => 'Semiconductor package with low profile switch node integrated heat spreader'
[patent_app_type] => utility
[patent_app_number] => 14/522989
[patent_app_country] => US
[patent_app_date] => 2014-10-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 10
[patent_no_of_words] => 5976
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 97
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14522989
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/522989 | Semiconductor package with low profile switch node integrated heat spreader | Oct 23, 2014 | Issued |
Array
(
[id] => 10230431
[patent_doc_number] => 20150115425
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-04-30
[patent_title] => 'MULTI-CHIP STACKED PACKAGE AND METHOD FOR FORMING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 14/521809
[patent_app_country] => US
[patent_app_date] => 2014-10-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2169
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14521809
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/521809 | Multi-chip stacked package and method for forming the same | Oct 22, 2014 | Issued |
Array
(
[id] => 10230436
[patent_doc_number] => 20150115430
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-04-30
[patent_title] => 'SEMICONDUCTOR PACKAGE AND WIRING BOARD HAVING THE SEMICONDUCTOR PACKAGE THEREON'
[patent_app_type] => utility
[patent_app_number] => 14/521609
[patent_app_country] => US
[patent_app_date] => 2014-10-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 12721
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14521609
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/521609 | Semiconductor package and wiring board having the semiconductor package thereon | Oct 22, 2014 | Issued |
Array
(
[id] => 10151851
[patent_doc_number] => 09184148
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-11-10
[patent_title] => 'Semiconductor package and method therefor'
[patent_app_type] => utility
[patent_app_number] => 14/521417
[patent_app_country] => US
[patent_app_date] => 2014-10-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 10
[patent_no_of_words] => 5881
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 84
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14521417
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/521417 | Semiconductor package and method therefor | Oct 21, 2014 | Issued |
Array
(
[id] => 10624383
[patent_doc_number] => 09343334
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-05-17
[patent_title] => 'Electronic component and method for manufacturing electronic component'
[patent_app_type] => utility
[patent_app_number] => 14/519658
[patent_app_country] => US
[patent_app_date] => 2014-10-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 16
[patent_no_of_words] => 6823
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 121
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14519658
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/519658 | Electronic component and method for manufacturing electronic component | Oct 20, 2014 | Issued |
Array
(
[id] => 10132028
[patent_doc_number] => 09165868
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-10-20
[patent_title] => 'Semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 14/519438
[patent_app_country] => US
[patent_app_date] => 2014-10-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 12
[patent_no_of_words] => 5357
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 385
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14519438
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/519438 | Semiconductor device | Oct 20, 2014 | Issued |
Array
(
[id] => 10158567
[patent_doc_number] => 09190351
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-11-17
[patent_title] => 'Semiconductor device with webbing between leads'
[patent_app_type] => utility
[patent_app_number] => 14/517934
[patent_app_country] => US
[patent_app_date] => 2014-10-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 7
[patent_no_of_words] => 4054
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 147
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14517934
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/517934 | Semiconductor device with webbing between leads | Oct 19, 2014 | Issued |
Array
(
[id] => 10086530
[patent_doc_number] => 09123885
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-09-01
[patent_title] => 'Piezoelectric device and method for manufacturing piezoelectric device'
[patent_app_type] => utility
[patent_app_number] => 14/516767
[patent_app_country] => US
[patent_app_date] => 2014-10-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 22
[patent_no_of_words] => 7802
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 125
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14516767
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/516767 | Piezoelectric device and method for manufacturing piezoelectric device | Oct 16, 2014 | Issued |