
Roy Karl Potter
Examiner (ID: 13991, Phone: (571)272-1842 , Office: P/2822 )
| Most Active Art Unit | 2822 |
| Art Unit(s) | 2822, 2508, 2811, 3621 |
| Total Applications | 2584 |
| Issued Applications | 2409 |
| Pending Applications | 46 |
| Abandoned Applications | 141 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 2897196
[patent_doc_number] => 05210439
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-05-11
[patent_title] => 'Power transistor monolithic integrated structure'
[patent_app_type] => 1
[patent_app_number] => 7/728011
[patent_app_country] => US
[patent_app_date] => 1991-07-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 8
[patent_no_of_words] => 3194
[patent_no_of_claims] => 37
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 122
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/210/05210439.pdf
[firstpage_image] =>[orig_patent_app_number] => 728011
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/728011 | Power transistor monolithic integrated structure | Jul 4, 1991 | Issued |
Array
(
[id] => 3480133
[patent_doc_number] => 05432375
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-07-11
[patent_title] => 'Thermistor intended primarily for temperature measurement'
[patent_app_type] => 1
[patent_app_number] => 7/725404
[patent_app_country] => US
[patent_app_date] => 1991-07-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 15
[patent_no_of_words] => 2744
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 104
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/432/05432375.pdf
[firstpage_image] =>[orig_patent_app_number] => 725404
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/725404 | Thermistor intended primarily for temperature measurement | Jun 30, 1991 | Issued |
Array
(
[id] => 3032065
[patent_doc_number] => 05289401
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-02-22
[patent_title] => 'Analog storage device for artificial neural network system'
[patent_app_type] => 1
[patent_app_number] => 7/717511
[patent_app_country] => US
[patent_app_date] => 1991-06-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 13
[patent_no_of_words] => 5731
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 157
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/289/05289401.pdf
[firstpage_image] =>[orig_patent_app_number] => 717511
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/717511 | Analog storage device for artificial neural network system | Jun 18, 1991 | Issued |
Array
(
[id] => 2982894
[patent_doc_number] => 05252854
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-10-12
[patent_title] => 'Semiconductor device having stacked lead structure'
[patent_app_type] => 1
[patent_app_number] => 7/717262
[patent_app_country] => US
[patent_app_date] => 1991-06-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 19
[patent_no_of_words] => 5654
[patent_no_of_claims] => 44
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 160
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/252/05252854.pdf
[firstpage_image] =>[orig_patent_app_number] => 717262
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/717262 | Semiconductor device having stacked lead structure | Jun 17, 1991 | Issued |
Array
(
[id] => 2980473
[patent_doc_number] => 05225709
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-07-06
[patent_title] => 'Package having a structure for stabilizing and/or impedance-matching a semiconductor IC device accommodated therein'
[patent_app_type] => 1
[patent_app_number] => 7/715068
[patent_app_country] => US
[patent_app_date] => 1991-06-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 42
[patent_no_of_words] => 4910
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 157
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/225/05225709.pdf
[firstpage_image] =>[orig_patent_app_number] => 715068
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/715068 | Package having a structure for stabilizing and/or impedance-matching a semiconductor IC device accommodated therein | Jun 12, 1991 | Issued |
Array
(
[id] => 3575825
[patent_doc_number] => 05539250
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-07-23
[patent_title] => 'Plastic-molded-type semiconductor device'
[patent_app_type] => 1
[patent_app_number] => 7/713100
[patent_app_country] => US
[patent_app_date] => 1991-06-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 20
[patent_no_of_words] => 5321
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 124
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/539/05539250.pdf
[firstpage_image] =>[orig_patent_app_number] => 713100
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/713100 | Plastic-molded-type semiconductor device | Jun 10, 1991 | Issued |
Array
(
[id] => 2901547
[patent_doc_number] => 05245214
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-09-14
[patent_title] => 'Method of designing a leadframe and a leadframe created thereby'
[patent_app_type] => 1
[patent_app_number] => 7/710996
[patent_app_country] => US
[patent_app_date] => 1991-06-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3477
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 182
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/245/05245214.pdf
[firstpage_image] =>[orig_patent_app_number] => 710996
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/710996 | Method of designing a leadframe and a leadframe created thereby | Jun 5, 1991 | Issued |
Array
(
[id] => 2939930
[patent_doc_number] => 05247204
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-09-21
[patent_title] => 'Semiconductor device having multilayer interconnection structure'
[patent_app_type] => 1
[patent_app_number] => 7/707692
[patent_app_country] => US
[patent_app_date] => 1991-05-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 23
[patent_no_of_words] => 5929
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 213
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/247/05247204.pdf
[firstpage_image] =>[orig_patent_app_number] => 707692
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/707692 | Semiconductor device having multilayer interconnection structure | May 29, 1991 | Issued |
| 07/707586 | ELECTRODE STRUCTURE FOR A SEMICONDUCTOR DEVICE | May 29, 1991 | Abandoned |
| 07/706940 | HYBRID INTEGRATED CIRCUIT DEVICE | May 28, 1991 | Abandoned |
Array
(
[id] => 3029348
[patent_doc_number] => 05303183
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-04-12
[patent_title] => 'Semiconductor memory device'
[patent_app_type] => 1
[patent_app_number] => 7/705812
[patent_app_country] => US
[patent_app_date] => 1991-05-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 16
[patent_no_of_words] => 6399
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 254
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/303/05303183.pdf
[firstpage_image] =>[orig_patent_app_number] => 705812
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/705812 | Semiconductor memory device | May 28, 1991 | Issued |
Array
(
[id] => 3104101
[patent_doc_number] => 05315153
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-05-24
[patent_title] => 'Packages for semiconductor integrated circuit'
[patent_app_type] => 1
[patent_app_number] => 7/689902
[patent_app_country] => US
[patent_app_date] => 1991-05-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 3
[patent_no_of_words] => 1541
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 96
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/315/05315153.pdf
[firstpage_image] =>[orig_patent_app_number] => 689902
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/689902 | Packages for semiconductor integrated circuit | May 28, 1991 | Issued |
Array
(
[id] => 2967566
[patent_doc_number] => 05264719
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-11-23
[patent_title] => 'High voltage lateral semiconductor device'
[patent_app_type] => 1
[patent_app_number] => 7/705509
[patent_app_country] => US
[patent_app_date] => 1991-05-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 15
[patent_no_of_words] => 5176
[patent_no_of_claims] => 42
[patent_no_of_ind_claims] => 10
[patent_words_short_claim] => 85
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/264/05264719.pdf
[firstpage_image] =>[orig_patent_app_number] => 705509
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/705509 | High voltage lateral semiconductor device | May 23, 1991 | Issued |
Array
(
[id] => 2942337
[patent_doc_number] => 05260600
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-11-09
[patent_title] => 'Semiconductor device having protective insulating film'
[patent_app_type] => 1
[patent_app_number] => 7/704422
[patent_app_country] => US
[patent_app_date] => 1991-05-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 28
[patent_no_of_words] => 5628
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 65
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/260/05260600.pdf
[firstpage_image] =>[orig_patent_app_number] => 704422
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/704422 | Semiconductor device having protective insulating film | May 22, 1991 | Issued |
Array
(
[id] => 2946399
[patent_doc_number] => 05223736
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-06-29
[patent_title] => 'Trench isolation process with reduced topography'
[patent_app_type] => 1
[patent_app_number] => 7/704232
[patent_app_country] => US
[patent_app_date] => 1991-05-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 13
[patent_no_of_words] => 3178
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 90
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/223/05223736.pdf
[firstpage_image] =>[orig_patent_app_number] => 704232
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/704232 | Trench isolation process with reduced topography | May 21, 1991 | Issued |
Array
(
[id] => 2981133
[patent_doc_number] => 05256900
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-10-26
[patent_title] => 'Package for semiconductor device with at least one through hole'
[patent_app_type] => 1
[patent_app_number] => 7/703268
[patent_app_country] => US
[patent_app_date] => 1991-05-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 7
[patent_no_of_words] => 1883
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 125
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/256/05256900.pdf
[firstpage_image] =>[orig_patent_app_number] => 703268
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/703268 | Package for semiconductor device with at least one through hole | May 21, 1991 | Issued |
| 07/699830 | ELECTRONIC COMPONENT | May 13, 1991 | Abandoned |
Array
(
[id] => 2898743
[patent_doc_number] => 05272368
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-12-21
[patent_title] => 'Complementary low power non-volatile reconfigurable EEcell'
[patent_app_type] => 1
[patent_app_number] => 7/698084
[patent_app_country] => US
[patent_app_date] => 1991-05-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 2614
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 52
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/272/05272368.pdf
[firstpage_image] =>[orig_patent_app_number] => 698084
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/698084 | Complementary low power non-volatile reconfigurable EEcell | May 9, 1991 | Issued |
Array
(
[id] => 2958300
[patent_doc_number] => 05231303
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-07-27
[patent_title] => 'Semiconductor device with incorporated stress reducing means'
[patent_app_type] => 1
[patent_app_number] => 7/696698
[patent_app_country] => US
[patent_app_date] => 1991-05-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 12
[patent_no_of_words] => 4993
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 128
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/231/05231303.pdf
[firstpage_image] =>[orig_patent_app_number] => 696698
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/696698 | Semiconductor device with incorporated stress reducing means | May 6, 1991 | Issued |
Array
(
[id] => 2783448
[patent_doc_number] => 05151767
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-09-29
[patent_title] => 'Power integrated circuit having reverse-voltage protection'
[patent_app_type] => 1
[patent_app_number] => 7/695490
[patent_app_country] => US
[patent_app_date] => 1991-05-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 8
[patent_no_of_words] => 3535
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 233
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/151/05151767.pdf
[firstpage_image] =>[orig_patent_app_number] => 695490
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/695490 | Power integrated circuit having reverse-voltage protection | May 2, 1991 | Issued |