| Application number | Title of the application | Filing Date | Status |
|---|
Array
(
[id] => 2828098
[patent_doc_number] => 05168343
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-12-01
[patent_title] => 'Semiconductor integrated circuit device having improved trench isolation'
[patent_app_type] => 1
[patent_app_number] => 7/635688
[patent_app_country] => US
[patent_app_date] => 1990-12-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 30
[patent_no_of_words] => 3835
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 50
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/168/05168343.pdf
[firstpage_image] =>[orig_patent_app_number] => 635688
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/635688 | Semiconductor integrated circuit device having improved trench isolation | Dec 27, 1990 | Issued |
Array
(
[id] => 2846261
[patent_doc_number] => 05161048
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-11-03
[patent_title] => 'Electrochromic window with metal grid counter electrode and acidic polyelectrolyte'
[patent_app_type] => 1
[patent_app_number] => 7/633893
[patent_app_country] => US
[patent_app_date] => 1990-12-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2974
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 82
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/161/05161048.pdf
[firstpage_image] =>[orig_patent_app_number] => 633893
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/633893 | Electrochromic window with metal grid counter electrode and acidic polyelectrolyte | Dec 25, 1990 | Issued |
Array
(
[id] => 2844371
[patent_doc_number] => 05121194
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-06-09
[patent_title] => 'Substrate output for a semiconductor device and a method of fabricating the same'
[patent_app_type] => 1
[patent_app_number] => 7/633982
[patent_app_country] => US
[patent_app_date] => 1990-12-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 8
[patent_no_of_words] => 2673
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 130
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/121/05121194.pdf
[firstpage_image] =>[orig_patent_app_number] => 633982
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/633982 | Substrate output for a semiconductor device and a method of fabricating the same | Dec 25, 1990 | Issued |
| 07/630568 | SEMICONDUCTOR DEVICE | Dec 19, 1990 | Abandoned |
Array
(
[id] => 2812870
[patent_doc_number] => 05148257
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-09-15
[patent_title] => 'Semiconductor device having U-groove'
[patent_app_type] => 1
[patent_app_number] => 7/627034
[patent_app_country] => US
[patent_app_date] => 1990-12-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 21
[patent_no_of_words] => 5301
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 151
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/148/05148257.pdf
[firstpage_image] =>[orig_patent_app_number] => 627034
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/627034 | Semiconductor device having U-groove | Dec 12, 1990 | Issued |
Array
(
[id] => 2885047
[patent_doc_number] => 05159428
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-10-27
[patent_title] => 'Sidewall-sealed poly-buffered LOCOS isolation'
[patent_app_type] => 1
[patent_app_number] => 7/622698
[patent_app_country] => US
[patent_app_date] => 1990-12-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 6
[patent_no_of_words] => 2480
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 79
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/159/05159428.pdf
[firstpage_image] =>[orig_patent_app_number] => 622698
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/622698 | Sidewall-sealed poly-buffered LOCOS isolation | Dec 4, 1990 | Issued |
| 07/617445 | PROCESS FOR THE SELECTIVE GROWTH OF GAAS | Nov 20, 1990 | Abandoned |
Array
(
[id] => 2885687
[patent_doc_number] => 05119158
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-06-02
[patent_title] => 'Gate array semiconductor integrated circuit device'
[patent_app_type] => 1
[patent_app_number] => 7/615888
[patent_app_country] => US
[patent_app_date] => 1990-11-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 4737
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 451
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/119/05119158.pdf
[firstpage_image] =>[orig_patent_app_number] => 615888
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/615888 | Gate array semiconductor integrated circuit device | Nov 19, 1990 | Issued |
Array
(
[id] => 2695305
[patent_doc_number] => 05049966
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-09-17
[patent_title] => 'Lateral transistor beta reduction by incorporation of electrically active material'
[patent_app_type] => 1
[patent_app_number] => 7/613410
[patent_app_country] => US
[patent_app_date] => 1990-11-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 13
[patent_no_of_words] => 4450
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 194
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/049/05049966.pdf
[firstpage_image] =>[orig_patent_app_number] => 613410
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/613410 | Lateral transistor beta reduction by incorporation of electrically active material | Nov 14, 1990 | Issued |
Array
(
[id] => 2942319
[patent_doc_number] => 05260599
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-11-09
[patent_title] => 'Conductive clearing frame for a semiconductor component'
[patent_app_type] => 1
[patent_app_number] => 7/611732
[patent_app_country] => US
[patent_app_date] => 1990-11-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 10
[patent_no_of_words] => 3349
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 88
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/260/05260599.pdf
[firstpage_image] =>[orig_patent_app_number] => 611732
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/611732 | Conductive clearing frame for a semiconductor component | Nov 12, 1990 | Issued |
| 07/609093 | MANGANESE-ALUMINUM FERROMAGNETIC THIN FILMS AND PROCESS FOR PREPARING THE SAME | Oct 30, 1990 | Abandoned |
Array
(
[id] => 2661904
[patent_doc_number] => 05073011
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-12-17
[patent_title] => 'Electrochromic device with a reference electrochromic element'
[patent_app_type] => 1
[patent_app_number] => 7/605359
[patent_app_country] => US
[patent_app_date] => 1990-10-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 2175
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 148
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/073/05073011.pdf
[firstpage_image] =>[orig_patent_app_number] => 605359
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/605359 | Electrochromic device with a reference electrochromic element | Oct 29, 1990 | Issued |
Array
(
[id] => 2867751
[patent_doc_number] => 05083180
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-01-21
[patent_title] => 'Lateral-type semiconductor device'
[patent_app_type] => 1
[patent_app_number] => 7/595580
[patent_app_country] => US
[patent_app_date] => 1990-10-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 11
[patent_no_of_words] => 3741
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 276
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/083/05083180.pdf
[firstpage_image] =>[orig_patent_app_number] => 595580
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/595580 | Lateral-type semiconductor device | Oct 10, 1990 | Issued |
| 07/592492 | INTEGRATED CIRCUIT DEVICE HAVING A GEOMETRY TO ENHANCE FABRICATION AND TESTING AND MANUFACTURING METHOD THEREOF | Oct 3, 1990 | Abandoned |
Array
(
[id] => 2885029
[patent_doc_number] => 05159427
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-10-27
[patent_title] => 'Semiconductor substrate structure for use in power IC device'
[patent_app_type] => 1
[patent_app_number] => 7/588544
[patent_app_country] => US
[patent_app_date] => 1990-09-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 24
[patent_no_of_words] => 5059
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 175
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/159/05159427.pdf
[firstpage_image] =>[orig_patent_app_number] => 588544
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/588544 | Semiconductor substrate structure for use in power IC device | Sep 25, 1990 | Issued |
| 07/587056 | BIPOLAR TRANSISTOR WITH REDUCED BASE/COLLECTOR CAPACITANCE AND PROCESS FOR PRODUCING THE SAME | Sep 23, 1990 | Abandoned |
Array
(
[id] => 2771234
[patent_doc_number] => 05063429
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-11-05
[patent_title] => 'High density input/output cell arrangement for integrated circuits'
[patent_app_type] => 1
[patent_app_number] => 7/583754
[patent_app_country] => US
[patent_app_date] => 1990-09-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4093
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 156
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/063/05063429.pdf
[firstpage_image] =>[orig_patent_app_number] => 583754
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/583754 | High density input/output cell arrangement for integrated circuits | Sep 16, 1990 | Issued |
Array
(
[id] => 2923674
[patent_doc_number] => 05179467
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-01-12
[patent_title] => 'Charge transfer salts and uses thereof'
[patent_app_type] => 1
[patent_app_number] => 7/583888
[patent_app_country] => US
[patent_app_date] => 1990-09-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 16
[patent_no_of_words] => 10466
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 76
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/179/05179467.pdf
[firstpage_image] =>[orig_patent_app_number] => 583888
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/583888 | Charge transfer salts and uses thereof | Sep 16, 1990 | Issued |
Array
(
[id] => 2825208
[patent_doc_number] => 05081509
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-01-14
[patent_title] => 'Semiconductor rectifying diode with pn geometry'
[patent_app_type] => 1
[patent_app_number] => 7/580534
[patent_app_country] => US
[patent_app_date] => 1990-09-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 23
[patent_no_of_words] => 5020
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 336
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/081/05081509.pdf
[firstpage_image] =>[orig_patent_app_number] => 580534
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/580534 | Semiconductor rectifying diode with pn geometry | Sep 10, 1990 | Issued |
Array
(
[id] => 2838748
[patent_doc_number] => 05175608
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-12-29
[patent_title] => 'Method of and apparatus for sputtering, and integrated circuit device'
[patent_app_type] => 1
[patent_app_number] => 7/574770
[patent_app_country] => US
[patent_app_date] => 1990-08-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 23
[patent_no_of_words] => 5309
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 34
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/175/05175608.pdf
[firstpage_image] =>[orig_patent_app_number] => 574770
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/574770 | Method of and apparatus for sputtering, and integrated circuit device | Aug 29, 1990 | Issued |