| Application number | Title of the application | Filing Date | Status |
|---|
Array
(
[id] => 2788619
[patent_doc_number] => 05087955
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-02-11
[patent_title] => 'Input-output circuit of reduced device area for semicustom semiconductor integrated circuit'
[patent_app_type] => 1
[patent_app_number] => 7/564232
[patent_app_country] => US
[patent_app_date] => 1990-08-08
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[pdf_file] => patents/05/087/05087955.pdf
[firstpage_image] =>[orig_patent_app_number] => 564232
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/564232 | Input-output circuit of reduced device area for semicustom semiconductor integrated circuit | Aug 7, 1990 | Issued |
Array
(
[id] => 2810163
[patent_doc_number] => 05124773
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-06-23
[patent_title] => 'Conductivity-modulation metal oxide semiconductor field effect transistor'
[patent_app_type] => 1
[patent_app_number] => 7/563720
[patent_app_country] => US
[patent_app_date] => 1990-08-07
[patent_effective_date] => 0000-00-00
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[firstpage_image] =>[orig_patent_app_number] => 563720
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/563720 | Conductivity-modulation metal oxide semiconductor field effect transistor | Aug 6, 1990 | Issued |
Array
(
[id] => 2701049
[patent_doc_number] => 05065209
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-11-12
[patent_title] => 'Bipolar transistor fabrication utilizing CMOS techniques'
[patent_app_type] => 1
[patent_app_number] => 7/558920
[patent_app_country] => US
[patent_app_date] => 1990-07-27
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/065/05065209.pdf
[firstpage_image] =>[orig_patent_app_number] => 558920
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/558920 | Bipolar transistor fabrication utilizing CMOS techniques | Jul 26, 1990 | Issued |
Array
(
[id] => 2677355
[patent_doc_number] => 05073813
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-12-17
[patent_title] => 'Semiconductor device having buried element isolation region'
[patent_app_type] => 1
[patent_app_number] => 7/557716
[patent_app_country] => US
[patent_app_date] => 1990-07-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
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[pdf_file] => patents/05/073/05073813.pdf
[firstpage_image] =>[orig_patent_app_number] => 557716
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/557716 | Semiconductor device having buried element isolation region | Jul 25, 1990 | Issued |
Array
(
[id] => 2739747
[patent_doc_number] => 05032888
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-07-16
[patent_title] => 'Conductivity modulation buried gate trench type MOSFET'
[patent_app_type] => 1
[patent_app_number] => 7/555770
[patent_app_country] => US
[patent_app_date] => 1990-07-23
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/032/05032888.pdf
[firstpage_image] =>[orig_patent_app_number] => 555770
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/555770 | Conductivity modulation buried gate trench type MOSFET | Jul 22, 1990 | Issued |
Array
(
[id] => 2810199
[patent_doc_number] => 05124775
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-06-23
[patent_title] => 'Semiconductor device with oxide sidewall'
[patent_app_type] => 1
[patent_app_number] => 7/557446
[patent_app_country] => US
[patent_app_date] => 1990-07-23
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[pdf_file] => patents/05/124/05124775.pdf
[firstpage_image] =>[orig_patent_app_number] => 557446
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/557446 | Semiconductor device with oxide sidewall | Jul 22, 1990 | Issued |
| 07/552082 | SEMICONDUCTOR IC DEVICE AND METHOD FOR MANUFACTURING THE SAME | Jul 12, 1990 | Abandoned |
| 07/533611 | CHARGE TRANSFER SALTS AND USES THEREOF | Jun 4, 1990 | Abandoned |
Array
(
[id] => 2763457
[patent_doc_number] => 05043773
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-08-27
[patent_title] => 'Wafer base for silicon carbide semiconductor devices, incorporating alloy substrates'
[patent_app_type] => 1
[patent_app_number] => 7/532906
[patent_app_country] => US
[patent_app_date] => 1990-06-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[patent_no_of_claims] => 9
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/043/05043773.pdf
[firstpage_image] =>[orig_patent_app_number] => 532906
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/532906 | Wafer base for silicon carbide semiconductor devices, incorporating alloy substrates | Jun 3, 1990 | Issued |
Array
(
[id] => 2976560
[patent_doc_number] => 05202790
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-04-13
[patent_title] => 'Photo-driven light beam deflecting apparatus'
[patent_app_type] => 1
[patent_app_number] => 7/530294
[patent_app_country] => US
[patent_app_date] => 1990-05-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[pdf_file] => patents/05/202/05202790.pdf
[firstpage_image] =>[orig_patent_app_number] => 530294
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/530294 | Photo-driven light beam deflecting apparatus | May 29, 1990 | Issued |
Array
(
[id] => 2845368
[patent_doc_number] => 05121249
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-06-09
[patent_title] => 'Fiber optic computational network utilizing optical and/or gate employing non-linear organic polymers and photovoltaic/piezoelectric optical interfaces'
[patent_app_type] => 1
[patent_app_number] => 7/513472
[patent_app_country] => US
[patent_app_date] => 1990-04-11
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/121/05121249.pdf
[firstpage_image] =>[orig_patent_app_number] => 513472
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/513472 | Fiber optic computational network utilizing optical and/or gate employing non-linear organic polymers and photovoltaic/piezoelectric optical interfaces | Apr 10, 1990 | Issued |
Array
(
[id] => 2752040
[patent_doc_number] => 05023697
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-06-11
[patent_title] => 'Semiconductor device with copper wire ball bonding'
[patent_app_type] => 1
[patent_app_number] => 7/505482
[patent_app_country] => US
[patent_app_date] => 1990-04-06
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/023/05023697.pdf
[firstpage_image] =>[orig_patent_app_number] => 505482
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/505482 | Semiconductor device with copper wire ball bonding | Apr 5, 1990 | Issued |
Array
(
[id] => 2855228
[patent_doc_number] => 05107321
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-04-21
[patent_title] => 'Interconnect method for semiconductor devices'
[patent_app_type] => 1
[patent_app_number] => 7/503336
[patent_app_country] => US
[patent_app_date] => 1990-04-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
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[pdf_file] => patents/05/107/05107321.pdf
[firstpage_image] =>[orig_patent_app_number] => 503336
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/503336 | Interconnect method for semiconductor devices | Apr 1, 1990 | Issued |
Array
(
[id] => 3103688
[patent_doc_number] => 05315130
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-05-24
[patent_title] => 'Very high density wafer scale device architecture'
[patent_app_type] => 1
[patent_app_number] => 7/502256
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[pdf_file] => patents/05/315/05315130.pdf
[firstpage_image] =>[orig_patent_app_number] => 502256
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/502256 | Very high density wafer scale device architecture | Mar 29, 1990 | Issued |
Array
(
[id] => 2782345
[patent_doc_number] => 05132753
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-07-21
[patent_title] => 'Optimization of BV and RDS-on by graded doping in LDD and other high voltage ICs'
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[patent_app_number] => 7/498170
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[pdf_file] => patents/05/132/05132753.pdf
[firstpage_image] =>[orig_patent_app_number] => 498170
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/498170 | Optimization of BV and RDS-on by graded doping in LDD and other high voltage ICs | Mar 22, 1990 | Issued |
| 07/491084 | SEMICONDUCTOR DEVICE | Mar 8, 1990 | Abandoned |
Array
(
[id] => 2714202
[patent_doc_number] => 05014106
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-05-07
[patent_title] => 'Semiconductor device for use in a hybrid LSI circuit'
[patent_app_type] => 1
[patent_app_number] => 7/489896
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[patent_app_date] => 1990-03-07
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/014/05014106.pdf
[firstpage_image] =>[orig_patent_app_number] => 489896
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/489896 | Semiconductor device for use in a hybrid LSI circuit | Mar 6, 1990 | Issued |
Array
(
[id] => 2837525
[patent_doc_number] => 05128737
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[patent_kind] => NA
[patent_issue_date] => 1992-07-07
[patent_title] => 'Semiconductor integrated circuit fabrication yield improvements'
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[firstpage_image] =>[orig_patent_app_number] => 487768
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/487768 | Semiconductor integrated circuit fabrication yield improvements | Mar 1, 1990 | Issued |
Array
(
[id] => 2855719
[patent_doc_number] => 05111270
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-05-05
[patent_title] => 'Three-dimensional contactless non-volatile memory cell'
[patent_app_type] => 1
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[patent_app_country] => US
[patent_app_date] => 1990-02-22
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[firstpage_image] =>[orig_patent_app_number] => 483466
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/483466 | Three-dimensional contactless non-volatile memory cell | Feb 21, 1990 | Issued |
Array
(
[id] => 2781198
[patent_doc_number] => 05075752
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[patent_kind] => NA
[patent_issue_date] => 1991-12-24
[patent_title] => 'Bi-CMOS semiconductor device having memory cells formed in isolated wells'
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[patent_app_date] => 1990-02-16
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[firstpage_image] =>[orig_patent_app_number] => 480762
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/480762 | Bi-CMOS semiconductor device having memory cells formed in isolated wells | Feb 15, 1990 | Issued |