
Roy Karl Potter
Examiner (ID: 13991, Phone: (571)272-1842 , Office: P/2822 )
| Most Active Art Unit | 2822 |
| Art Unit(s) | 2822, 2508, 2811, 3621 |
| Total Applications | 2584 |
| Issued Applications | 2409 |
| Pending Applications | 46 |
| Abandoned Applications | 141 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 9255239
[patent_doc_number] => 08618658
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2013-12-31
[patent_title] => 'Semiconductor device and fabricating method thereof'
[patent_app_type] => utility
[patent_app_number] => 12/727608
[patent_app_country] => US
[patent_app_date] => 2010-03-19
[patent_effective_date] => 0000-00-00
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[patent_no_of_words] => 4632
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[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12727608
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/727608 | Semiconductor device and fabricating method thereof | Mar 18, 2010 | Issued |
Array
(
[id] => 6321582
[patent_doc_number] => 20100244274
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-09-30
[patent_title] => 'WIRING BOARD'
[patent_app_type] => utility
[patent_app_number] => 12/727617
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/727617 | WIRING BOARD | Mar 18, 2010 | Abandoned |
Array
(
[id] => 7699381
[patent_doc_number] => 20110227209
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-09-22
[patent_title] => 'INTEGRATED CIRCUIT PACKAGE SYSTEM WITH PACKAGE STACKING AND METHOD OF MANUFACTURE THEREOF'
[patent_app_type] => utility
[patent_app_number] => 12/727229
[patent_app_country] => US
[patent_app_date] => 2010-03-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[firstpage_image] =>[orig_patent_app_number] => 12727229
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/727229 | Integrated circuit package system with package stacking and method of manufacture thereof | Mar 17, 2010 | Issued |
Array
(
[id] => 8726089
[patent_doc_number] => 08405211
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-03-26
[patent_title] => 'Bump pad structure'
[patent_app_type] => utility
[patent_app_number] => 12/726449
[patent_app_country] => US
[patent_app_date] => 2010-03-18
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/726449 | Bump pad structure | Mar 17, 2010 | Issued |
Array
(
[id] => 8702025
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[patent_title] => 'Semiconductor device and manufacturing method therefor'
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Array
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Array
(
[id] => 9113712
[patent_doc_number] => 08569891
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[patent_issue_date] => 2013-10-29
[patent_title] => 'Forming array contacts in semiconductor memories'
[patent_app_type] => utility
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12724491
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/724491 | Forming array contacts in semiconductor memories | Mar 15, 2010 | Issued |
Array
(
[id] => 6375983
[patent_doc_number] => 20100301465
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[patent_kind] => A1
[patent_issue_date] => 2010-12-02
[patent_title] => 'LEAD FRAME, LEAD FRAME FABRICATION, AND SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 12/723894
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[firstpage_image] =>[orig_patent_app_number] => 12723894
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/723894 | Lead frame, lead frame fabrication, and semiconductor device | Mar 14, 2010 | Issued |
Array
(
[id] => 6231346
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[patent_issue_date] => 2010-10-21
[patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 12/723801
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Array
(
[id] => 8577599
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[patent_issue_date] => 2013-01-01
[patent_title] => 'Semiconductor device and method of forming repassivation layer with reduced opening to contact pad of semiconductor die'
[patent_app_type] => utility
[patent_app_number] => 12/724367
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Array
(
[id] => 6519451
[patent_doc_number] => 20100230824
[patent_country] => US
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[patent_issue_date] => 2010-09-16
[patent_title] => 'Metal Interconnect of Semiconductor Device'
[patent_app_type] => utility
[patent_app_number] => 12/722643
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/722643 | Metal interconnect of semiconductor device | Mar 11, 2010 | Issued |
Array
(
[id] => 8642493
[patent_doc_number] => 08367477
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[patent_title] => 'Electronic device package and method for forming the same'
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Array
(
[id] => 8802745
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/721016 | Light emitting diode wafer-level package with self-aligning features | Mar 9, 2010 | Issued |
Array
(
[id] => 6519139
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Array
(
[id] => 6083790
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[patent_title] => 'ALIGNMENT OF WAFERS FOR 3D INTEGRATION'
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/718880 | Integrally molded die and bezel structure for fingerprint sensors and the like | Mar 4, 2010 | Issued |
Array
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Array
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/717518 | Flip chip package maintaining alignment during soldering | Mar 3, 2010 | Issued |
Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/717591 | Metal post chip connecting device and method free to use soldering material | Mar 3, 2010 | Issued |