Roy Karl Potter

Array ( [id] => 4465867 [patent_doc_number] => 07936050 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-05-03 [patent_title] => 'Semiconductor device and method of fabricating semiconductor device' [patent_app_type] => utility [patent_app_number] => 12/573837 [patent_app_country] => US [patent_app_date] => 2009-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 1832 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/936/07936050.pdf [firstpage_image] =>[orig_patent_app_number] => 12573837 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4487726 [patent_doc_number] => 07902666 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-03-08 [patent_title] => 'Flip chip device having soldered metal posts by surface mounting' [patent_app_type] => utility [patent_app_number] => 12/573608 [patent_app_country] => US [patent_app_date] => 2009-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 29 [patent_no_of_words] => 5746 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/902/07902666.pdf [firstpage_image] =>[orig_patent_app_number] => 12573608 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6446686 [patent_doc_number] => 20100283154 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-11-11 [patent_title] => 'SPUTTERING TARGET AND SEMICONDUCTOR DEVICE MANUFACTURED USING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/573437 [patent_app_country] => US [patent_app_date] => 2009-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3512 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0283/20100283154.pdf [firstpage_image] =>[orig_patent_app_number] => 12573437 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4435406 [patent_doc_number] => 07898078 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-03-01 [patent_title] => 'Power connector/decoupler integrated in a heat sink' [patent_app_type] => utility [patent_app_number] => 12/568837 [patent_app_country] => US [patent_app_date] => 2009-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5150 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/898/07898078.pdf [firstpage_image] =>[orig_patent_app_number] => 12568837 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8422273 [patent_doc_number] => 08278762 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-10-02 [patent_title] => 'Method of manufacturing photomask and method of repairing optical proximity correction' [patent_app_type] => utility [patent_app_number] => 12/568027 [patent_app_country] => US [patent_app_date] => 2009-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 3868 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12568027 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6375111 [patent_doc_number] => 20100081240 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-04-01 [patent_title] => 'Semiconductor device and method of manufacturing semiconductor device' [patent_app_type] => utility [patent_app_number] => 12/585554 [patent_app_country] => US [patent_app_date] => 2009-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 4688 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0081/20100081240.pdf [firstpage_image] =>[orig_patent_app_number] => 12585554 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6199777 [patent_doc_number] => 20110062563 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-03-17 [patent_title] => 'NON-VOLATILE MEMORY WITH REDUCED MOBILE ION DIFFUSION' [patent_app_type] => utility [patent_app_number] => 12/560727 [patent_app_country] => US [patent_app_date] => 2009-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 8237 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0062/20110062563.pdf [firstpage_image] =>[orig_patent_app_number] => 12560727 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6199801 [patent_doc_number] => 20110062587 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-03-17 [patent_title] => 'LARGE GRAIN SIZE CONDUCTIVE STRUCTURE FOR NARROW INTERCONNECT OPENINGS' [patent_app_type] => utility [patent_app_number] => 12/560878 [patent_app_country] => US [patent_app_date] => 2009-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5259 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0062/20110062587.pdf [firstpage_image] =>[orig_patent_app_number] => 12560878 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6295151 [patent_doc_number] => 20100065957 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-03-18 [patent_title] => 'PACKAGE SUBSTRATE, SEMICONDUCTOR PACKAGE HAVING THE PACKAGE SUBSTRATE' [patent_app_type] => utility [patent_app_number] => 12/558138 [patent_app_country] => US [patent_app_date] => 2009-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4131 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0065/20100065957.pdf [firstpage_image] =>[orig_patent_app_number] => 12558138 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4523402 [patent_doc_number] => 07951712 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-05-31 [patent_title] => 'Interconnections having double capping layer and method for forming the same' [patent_app_type] => utility [patent_app_number] => 12/556094 [patent_app_country] => US [patent_app_date] => 2009-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3595 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/951/07951712.pdf [firstpage_image] =>[orig_patent_app_number] => 12556094 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5461688 [patent_doc_number] => 20090321888 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-31 [patent_title] => 'ALIGNMENT FOR BACKSIDE ILLUMINATION SENSOR' [patent_app_type] => utility [patent_app_number] => 12/553586 [patent_app_country] => US [patent_app_date] => 2009-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8434 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0321/20090321888.pdf [firstpage_image] =>[orig_patent_app_number] => 12553586 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6021360 [patent_doc_number] => 20110049686 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-03-03 [patent_title] => 'SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/553628 [patent_app_country] => US [patent_app_date] => 2009-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2420 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0049/20110049686.pdf [firstpage_image] =>[orig_patent_app_number] => 12553628 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6342604 [patent_doc_number] => 20100084743 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-04-08 [patent_title] => 'METHOD FOR REDUCING CRYSTAL DEFECT OF SIMOX WAFER AND SIMOX WAFER' [patent_app_type] => utility [patent_app_number] => 12/551958 [patent_app_country] => US [patent_app_date] => 2009-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7598 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0084/20100084743.pdf [firstpage_image] =>[orig_patent_app_number] => 12551958 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8018179 [patent_doc_number] => 08138594 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-03-20 [patent_title] => 'Semiconductor device and manufacturing method of a semiconductor device' [patent_app_type] => utility [patent_app_number] => 12/551888 [patent_app_country] => US [patent_app_date] => 2009-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 16 [patent_no_of_words] => 2488 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/138/08138594.pdf [firstpage_image] =>[orig_patent_app_number] => 12551888 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5989389 [patent_doc_number] => 20110012252 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-01-20 [patent_title] => 'POWER SEMICONDUCTOR MODULE AND METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/551238 [patent_app_country] => US [patent_app_date] => 2009-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4889 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0012/20110012252.pdf [firstpage_image] =>[orig_patent_app_number] => 12551238 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4492642 [patent_doc_number] => 07955899 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-06-07 [patent_title] => 'Method for providing and removing discharging interconnect for chip-on-glass output leads and structures thereof' [patent_app_type] => utility [patent_app_number] => 12/551261 [patent_app_country] => US [patent_app_date] => 2009-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 27 [patent_no_of_words] => 9203 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/955/07955899.pdf [firstpage_image] =>[orig_patent_app_number] => 12551261 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8190270 [patent_doc_number] => 08183683 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-05-22 [patent_title] => 'Semiconductor device and fabricating method thereof' [patent_app_type] => utility [patent_app_number] => 12/549068 [patent_app_country] => US [patent_app_date] => 2009-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 5056 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/183/08183683.pdf [firstpage_image] =>[orig_patent_app_number] => 12549068 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6507921 [patent_doc_number] => 20100219505 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-02 [patent_title] => 'NITRIDE CRYSTAL WITH REMOVABLE SURFACE LAYER AND METHODS OF MANUFACTURE' [patent_app_type] => utility [patent_app_number] => 12/546458 [patent_app_country] => US [patent_app_date] => 2009-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 7271 [patent_no_of_claims] => 53 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0219/20100219505.pdf [firstpage_image] =>[orig_patent_app_number] => 12546458 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7752653 [patent_doc_number] => 08110903 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-02-07 [patent_title] => 'QFN package' [patent_app_type] => utility [patent_app_number] => 12/544468 [patent_app_country] => US [patent_app_date] => 2009-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 4630 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/110/08110903.pdf [firstpage_image] =>[orig_patent_app_number] => 12544468 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8578299 [patent_doc_number] => 08344512 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-01-01 [patent_title] => 'Three-dimensional silicon interposer for low voltage low power systems' [patent_app_type] => utility [patent_app_number] => 12/544987 [patent_app_country] => US [patent_app_date] => 2009-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 17 [patent_no_of_words] => 9661 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12544987 [rel_patent_id] =>[rel_patent_doc_number] =>)