
Roy Karl Potter
Examiner (ID: 13991, Phone: (571)272-1842 , Office: P/2822 )
| Most Active Art Unit | 2822 |
| Art Unit(s) | 2822, 2508, 2811, 3621 |
| Total Applications | 2584 |
| Issued Applications | 2409 |
| Pending Applications | 46 |
| Abandoned Applications | 141 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 4531973
[patent_doc_number] => 07923739
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-04-12
[patent_title] => 'Solid state lighting device'
[patent_app_type] => utility
[patent_app_number] => 12/479318
[patent_app_country] => US
[patent_app_date] => 2009-06-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 18
[patent_no_of_words] => 5566
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 113
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/923/07923739.pdf
[firstpage_image] =>[orig_patent_app_number] => 12479318
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/479318 | Solid state lighting device | Jun 4, 2009 | Issued |
Array
(
[id] => 5364873
[patent_doc_number] => 20090302432
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-12-10
[patent_title] => 'SILICON EPITAXIAL WAFER AND THE PRODUCTION METHOD THEREOF'
[patent_app_type] => utility
[patent_app_number] => 12/477207
[patent_app_country] => US
[patent_app_date] => 2009-06-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
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[pdf_file] => publications/A1/0302/20090302432.pdf
[firstpage_image] =>[orig_patent_app_number] => 12477207
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/477207 | Silicon epitaxial wafer and the production method thereof | Jun 2, 2009 | Issued |
Array
(
[id] => 5300288
[patent_doc_number] => 20090294940
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-12-03
[patent_title] => 'SEMICONDUCTOR LIGHT EMITTING DEVICE'
[patent_app_type] => utility
[patent_app_number] => 12/473944
[patent_app_country] => US
[patent_app_date] => 2009-05-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[patent_no_of_words] => 4232
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[pdf_file] => publications/A1/0294/20090294940.pdf
[firstpage_image] =>[orig_patent_app_number] => 12473944
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/473944 | Semiconductor light emitting device | May 27, 2009 | Issued |
Array
(
[id] => 6375974
[patent_doc_number] => 20100301463
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-12-02
[patent_title] => 'REDUCED SOFT ERROR RATE THROUGH METAL FILL AND PLACEMENT'
[patent_app_type] => utility
[patent_app_number] => 12/473435
[patent_app_country] => US
[patent_app_date] => 2009-05-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[patent_no_of_words] => 2113
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[pdf_file] => publications/A1/0301/20100301463.pdf
[firstpage_image] =>[orig_patent_app_number] => 12473435
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/473435 | Reduced soft error rate through metal fill and placement | May 27, 2009 | Issued |
Array
(
[id] => 6549776
[patent_doc_number] => 20100127381
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-05-27
[patent_title] => 'Integrated Circuit Devices Having Printed Circuit Boards Therein With Staggered Bond Fingers That Support Improved Electrical Isolation'
[patent_app_type] => utility
[patent_app_number] => 12/472725
[patent_app_country] => US
[patent_app_date] => 2009-05-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
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[patent_no_of_words] => 3172
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[pdf_file] => publications/A1/0127/20100127381.pdf
[firstpage_image] =>[orig_patent_app_number] => 12472725
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/472725 | Integrated circuit devices having printed circuit boards therein with staggered bond fingers that support improved electrical isolation | May 26, 2009 | Issued |
Array
(
[id] => 6375957
[patent_doc_number] => 20100301461
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-12-02
[patent_title] => 'RELIABLE INTERCONNECTION'
[patent_app_type] => utility
[patent_app_number] => 12/473232
[patent_app_country] => US
[patent_app_date] => 2009-05-27
[patent_effective_date] => 0000-00-00
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[firstpage_image] =>[orig_patent_app_number] => 12473232
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/473232 | Reliable interconnection | May 26, 2009 | Issued |
Array
(
[id] => 7740394
[patent_doc_number] => 08105943
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-01-31
[patent_title] => 'Enhancing structural integrity and defining critical dimensions of metallization systems of semiconductor devices by using ALD techniques'
[patent_app_type] => utility
[patent_app_number] => 12/472824
[patent_app_country] => US
[patent_app_date] => 2009-05-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[patent_no_of_words] => 6904
[patent_no_of_claims] => 20
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/105/08105943.pdf
[firstpage_image] =>[orig_patent_app_number] => 12472824
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/472824 | Enhancing structural integrity and defining critical dimensions of metallization systems of semiconductor devices by using ALD techniques | May 26, 2009 | Issued |
Array
(
[id] => 5396303
[patent_doc_number] => 20090316366
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-12-24
[patent_title] => 'System and Method for Dissipating Heat From A Semiconductor Module'
[patent_app_type] => utility
[patent_app_number] => 12/472340
[patent_app_country] => US
[patent_app_date] => 2009-05-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
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[patent_no_of_words] => 4317
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[pdf_file] => publications/A1/0316/20090316366.pdf
[firstpage_image] =>[orig_patent_app_number] => 12472340
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/472340 | System and method for dissipating heat from a semiconductor module | May 25, 2009 | Issued |
Array
(
[id] => 6421962
[patent_doc_number] => 20100102293
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-04-29
[patent_title] => 'III/V-SEMICONDUCTOR'
[patent_app_type] => utility
[patent_app_number] => 12/472224
[patent_app_country] => US
[patent_app_date] => 2009-05-26
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[pdf_file] => publications/A1/0102/20100102293.pdf
[firstpage_image] =>[orig_patent_app_number] => 12472224
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/472224 | III/V-semiconductor | May 25, 2009 | Issued |
Array
(
[id] => 6402990
[patent_doc_number] => 20100139767
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-06-10
[patent_title] => 'CHIP PACKAGE STRUCTURE AND METHOD OF FABRICATING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 12/472359
[patent_app_country] => US
[patent_app_date] => 2009-05-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
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[pdf_file] => publications/A1/0139/20100139767.pdf
[firstpage_image] =>[orig_patent_app_number] => 12472359
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/472359 | Chip package structure and method of fabricating the same | May 25, 2009 | Issued |
Array
(
[id] => 5300301
[patent_doc_number] => 20090294953
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-12-03
[patent_title] => 'INTEGRATED CIRCUIT PACKAGE MODULE AND METHOD OF THE SAME'
[patent_app_type] => utility
[patent_app_number] => 12/471712
[patent_app_country] => US
[patent_app_date] => 2009-05-26
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/471712 | Integrated circuit package module and method of the same | May 25, 2009 | Issued |
Array
(
[id] => 5488281
[patent_doc_number] => 20090289352
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[patent_title] => 'SEMICONDUCTOR DEVICE AND A METHOD FOR MANUFACTURING THE SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 12/470703
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/470703 | SEMICONDUCTOR DEVICE AND A METHOD FOR MANUFACTURING THE SEMICONDUCTOR DEVICE | May 21, 2009 | Abandoned |
Array
(
[id] => 5488290
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[patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/470809 | Semiconductor device and method of manufacturing a semiconductor device | May 21, 2009 | Issued |
Array
(
[id] => 4614357
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[patent_title] => 'Microelectronic device with integrated energy source'
[patent_app_type] => utility
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/467703 | Microelectronic device with integrated energy source | May 17, 2009 | Issued |
Array
(
[id] => 5512106
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[patent_title] => 'STACK DIE PACKAGES'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/434264 | Stack die packages | Apr 30, 2009 | Issued |
Array
(
[id] => 5313655
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[patent_title] => 'Semi-finished package and method for making a package'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/387266 | Semi-finished package and method for making a package | Apr 29, 2009 | Issued |
Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/431827 | Reworkable electronic device assembly and method | Apr 28, 2009 | Issued |
Array
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Array
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Array
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[patent_title] => 'Tape for heat dissipating member, chip on film type semiconductor package including heat dissipating member, and elctronic apparatus including the same'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/385731 | Tape for heat dissipating member, chip on film type semiconductor package including heat dissipating member, and electronic apparatus including the same | Apr 16, 2009 | Issued |