
Roy Karl Potter
Examiner (ID: 13991, Phone: (571)272-1842 , Office: P/2822 )
| Most Active Art Unit | 2822 |
| Art Unit(s) | 2822, 2508, 2811, 3621 |
| Total Applications | 2584 |
| Issued Applications | 2409 |
| Pending Applications | 46 |
| Abandoned Applications | 141 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 5555630
[patent_doc_number] => 20090267207
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-10-29
[patent_title] => 'SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF'
[patent_app_type] => utility
[patent_app_number] => 12/258067
[patent_app_country] => US
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[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/258067 | Semiconductor device and manufacturing method thereof | Oct 23, 2008 | Issued |
Array
(
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[patent_doc_number] => 07750474
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2010-07-06
[patent_title] => 'Metal programmable logic and multiple function pin interface'
[patent_app_type] => utility
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/258087 | Metal programmable logic and multiple function pin interface | Oct 23, 2008 | Issued |
Array
(
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[patent_doc_number] => 20100213622
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[patent_kind] => A1
[patent_issue_date] => 2010-08-26
[patent_title] => 'SEMICONDUCTOR DEVICE'
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[patent_app_number] => 12/682677
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/682677 | Semiconductor device | Oct 8, 2008 | Issued |
Array
(
[id] => 5282305
[patent_doc_number] => 20090095979
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[patent_kind] => A1
[patent_issue_date] => 2009-04-16
[patent_title] => 'Power Module'
[patent_app_type] => utility
[patent_app_number] => 12/243098
[patent_app_country] => US
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Array
(
[id] => 6358950
[patent_doc_number] => 20100078805
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[patent_kind] => A1
[patent_issue_date] => 2010-04-01
[patent_title] => 'METHOD AND CORE MATERIALS FOR SEMICONDUCTOR PACKAGING'
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[patent_app_date] => 2008-09-30
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/242414 | Method and core materials for semiconductor packaging | Sep 29, 2008 | Issued |
Array
(
[id] => 6358953
[patent_doc_number] => 20100078806
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-04-01
[patent_title] => 'MICROELECTRONIC PACKAGE WITH WEAR RESISTANT COATING'
[patent_app_type] => utility
[patent_app_number] => 12/242398
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/242398 | Microelectronic package with wear resistant coating | Sep 29, 2008 | Issued |
Array
(
[id] => 102482
[patent_doc_number] => 07723223
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[patent_issue_date] => 2010-05-25
[patent_title] => 'Method of doping transistor comprising carbon nanotube, method of controlling position of doping ion, and transistors using the same'
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[pdf_file] => patents/07/723/07723223.pdf
[firstpage_image] =>[orig_patent_app_number] => 12232958
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/232958 | Method of doping transistor comprising carbon nanotube, method of controlling position of doping ion, and transistors using the same | Sep 25, 2008 | Issued |
Array
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[id] => 8630538
[patent_doc_number] => 08362611
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[patent_issue_date] => 2013-01-29
[patent_title] => 'Semiconductor module, method for manufacturing semiconductor module, and portable device'
[patent_app_type] => utility
[patent_app_number] => 12/679595
[patent_app_country] => US
[patent_app_date] => 2008-09-25
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Array
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[id] => 6352672
[patent_doc_number] => 20100072590
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[patent_kind] => A1
[patent_issue_date] => 2010-03-25
[patent_title] => 'Stacking Quad Pre-Molded Component Packages, Systems Using the Same, and Methods of Making the Same'
[patent_app_type] => utility
[patent_app_number] => 12/235227
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/235227 | Stacking quad pre-molded component packages, systems using the same, and methods of making the same | Sep 21, 2008 | Issued |
Array
(
[id] => 5307618
[patent_doc_number] => 20090014899
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-01-15
[patent_title] => 'INTEGRATED CIRCUIT PACKAGE SYSTEM INCLUDING STACKED DIE'
[patent_app_type] => utility
[patent_app_number] => 12/235521
[patent_app_country] => US
[patent_app_date] => 2008-09-22
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/235521 | Integrated circuit package system including stacked die | Sep 21, 2008 | Issued |
Array
(
[id] => 5488246
[patent_doc_number] => 20090289317
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Array
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Array
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[patent_title] => 'Semiconductor chip having alignment mark and method of manufacturing the same'
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Array
(
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[patent_title] => 'Wire bonded wafer level cavity package'
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Array
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Array
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Array
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Array
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