Search

Roy Karl Potter

Examiner (ID: 13991, Phone: (571)272-1842 , Office: P/2822 )

Most Active Art Unit
2822
Art Unit(s)
2822, 2508, 2811, 3621
Total Applications
2584
Issued Applications
2409
Pending Applications
46
Abandoned Applications
141

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5555630 [patent_doc_number] => 20090267207 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-10-29 [patent_title] => 'SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 12/258067 [patent_app_country] => US [patent_app_date] => 2008-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 7698 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0267/20090267207.pdf [firstpage_image] =>[orig_patent_app_number] => 12258067 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/258067
Semiconductor device and manufacturing method thereof Oct 23, 2008 Issued
Array ( [id] => 75310 [patent_doc_number] => 07750474 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-07-06 [patent_title] => 'Metal programmable logic and multiple function pin interface' [patent_app_type] => utility [patent_app_number] => 12/258087 [patent_app_country] => US [patent_app_date] => 2008-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 5069 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/750/07750474.pdf [firstpage_image] =>[orig_patent_app_number] => 12258087 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/258087
Metal programmable logic and multiple function pin interface Oct 23, 2008 Issued
Array ( [id] => 6479297 [patent_doc_number] => 20100213622 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-26 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 12/682677 [patent_app_country] => US [patent_app_date] => 2008-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4914 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0213/20100213622.pdf [firstpage_image] =>[orig_patent_app_number] => 12682677 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/682677
Semiconductor device Oct 8, 2008 Issued
Array ( [id] => 5282305 [patent_doc_number] => 20090095979 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-04-16 [patent_title] => 'Power Module' [patent_app_type] => utility [patent_app_number] => 12/243098 [patent_app_country] => US [patent_app_date] => 2008-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4863 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0095/20090095979.pdf [firstpage_image] =>[orig_patent_app_number] => 12243098 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/243098
Power module Sep 30, 2008 Issued
Array ( [id] => 6358950 [patent_doc_number] => 20100078805 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-04-01 [patent_title] => 'METHOD AND CORE MATERIALS FOR SEMICONDUCTOR PACKAGING' [patent_app_type] => utility [patent_app_number] => 12/242414 [patent_app_country] => US [patent_app_date] => 2008-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3043 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0078/20100078805.pdf [firstpage_image] =>[orig_patent_app_number] => 12242414 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/242414
Method and core materials for semiconductor packaging Sep 29, 2008 Issued
Array ( [id] => 6358953 [patent_doc_number] => 20100078806 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-04-01 [patent_title] => 'MICROELECTRONIC PACKAGE WITH WEAR RESISTANT COATING' [patent_app_type] => utility [patent_app_number] => 12/242398 [patent_app_country] => US [patent_app_date] => 2008-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2677 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0078/20100078806.pdf [firstpage_image] =>[orig_patent_app_number] => 12242398 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/242398
Microelectronic package with wear resistant coating Sep 29, 2008 Issued
Array ( [id] => 102482 [patent_doc_number] => 07723223 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-05-25 [patent_title] => 'Method of doping transistor comprising carbon nanotube, method of controlling position of doping ion, and transistors using the same' [patent_app_type] => utility [patent_app_number] => 12/232958 [patent_app_country] => US [patent_app_date] => 2008-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 3697 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/723/07723223.pdf [firstpage_image] =>[orig_patent_app_number] => 12232958 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/232958
Method of doping transistor comprising carbon nanotube, method of controlling position of doping ion, and transistors using the same Sep 25, 2008 Issued
Array ( [id] => 8630538 [patent_doc_number] => 08362611 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-01-29 [patent_title] => 'Semiconductor module, method for manufacturing semiconductor module, and portable device' [patent_app_type] => utility [patent_app_number] => 12/679595 [patent_app_country] => US [patent_app_date] => 2008-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 19 [patent_no_of_words] => 5818 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12679595 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/679595
Semiconductor module, method for manufacturing semiconductor module, and portable device Sep 24, 2008 Issued
Array ( [id] => 6352672 [patent_doc_number] => 20100072590 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-03-25 [patent_title] => 'Stacking Quad Pre-Molded Component Packages, Systems Using the Same, and Methods of Making the Same' [patent_app_type] => utility [patent_app_number] => 12/235227 [patent_app_country] => US [patent_app_date] => 2008-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5895 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0072/20100072590.pdf [firstpage_image] =>[orig_patent_app_number] => 12235227 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/235227
Stacking quad pre-molded component packages, systems using the same, and methods of making the same Sep 21, 2008 Issued
Array ( [id] => 5307618 [patent_doc_number] => 20090014899 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-15 [patent_title] => 'INTEGRATED CIRCUIT PACKAGE SYSTEM INCLUDING STACKED DIE' [patent_app_type] => utility [patent_app_number] => 12/235521 [patent_app_country] => US [patent_app_date] => 2008-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2539 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0014/20090014899.pdf [firstpage_image] =>[orig_patent_app_number] => 12235521 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/235521
Integrated circuit package system including stacked die Sep 21, 2008 Issued
Array ( [id] => 5488246 [patent_doc_number] => 20090289317 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-11-26 [patent_title] => 'PACKAGING STRUCTURE AND METHOD FOR FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/233807 [patent_app_country] => US [patent_app_date] => 2008-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4906 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0289/20090289317.pdf [firstpage_image] =>[orig_patent_app_number] => 12233807 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/233807
Packaging structure and method for fabricating the same Sep 18, 2008 Issued
Array ( [id] => 6247312 [patent_doc_number] => 20100025844 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-02-04 [patent_title] => 'SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 12/515437 [patent_app_country] => US [patent_app_date] => 2008-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 37 [patent_no_of_words] => 11603 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0025/20100025844.pdf [firstpage_image] =>[orig_patent_app_number] => 12515437 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/515437
Semiconductor device and manufacturing method thereof Sep 18, 2008 Issued
Array ( [id] => 5602 [patent_doc_number] => 07812465 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-10-12 [patent_title] => 'Semiconductor chip having alignment mark and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 12/232528 [patent_app_country] => US [patent_app_date] => 2008-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 15 [patent_no_of_words] => 4288 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/812/07812465.pdf [firstpage_image] =>[orig_patent_app_number] => 12232528 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/232528
Semiconductor chip having alignment mark and method of manufacturing the same Sep 17, 2008 Issued
Array ( [id] => 4568556 [patent_doc_number] => 07858445 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-12-28 [patent_title] => 'Wire bonded wafer level cavity package' [patent_app_type] => utility [patent_app_number] => 12/283710 [patent_app_country] => US [patent_app_date] => 2008-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 40 [patent_no_of_words] => 11036 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/858/07858445.pdf [firstpage_image] =>[orig_patent_app_number] => 12283710 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/283710
Wire bonded wafer level cavity package Sep 14, 2008 Issued
Array ( [id] => 5268620 [patent_doc_number] => 20090072395 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-03-19 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/208718 [patent_app_country] => US [patent_app_date] => 2008-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3790 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0072/20090072395.pdf [firstpage_image] =>[orig_patent_app_number] => 12208718 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/208718
Semiconductor device and method for manufacturing the same Sep 10, 2008 Issued
Array ( [id] => 112293 [patent_doc_number] => 07713781 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-05-11 [patent_title] => 'Methods for forming quad flat no-lead (QFN) packages' [patent_app_type] => utility [patent_app_number] => 12/207719 [patent_app_country] => US [patent_app_date] => 2008-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 5646 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/713/07713781.pdf [firstpage_image] =>[orig_patent_app_number] => 12207719 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/207719
Methods for forming quad flat no-lead (QFN) packages Sep 9, 2008 Issued
Array ( [id] => 8422173 [patent_doc_number] => 08278661 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-10-02 [patent_title] => 'Thin film transistor, display device including the same, and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 12/206327 [patent_app_country] => US [patent_app_date] => 2008-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 9383 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12206327 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/206327
Thin film transistor, display device including the same, and method for manufacturing the same Sep 7, 2008 Issued
Array ( [id] => 178304 [patent_doc_number] => 07656013 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-02-02 [patent_title] => 'Multilayer wiring substrate, method of manufacturing the same, and semiconductor device' [patent_app_type] => utility [patent_app_number] => 12/205057 [patent_app_country] => US [patent_app_date] => 2008-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 18 [patent_no_of_words] => 8014 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/656/07656013.pdf [firstpage_image] =>[orig_patent_app_number] => 12205057 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/205057
Multilayer wiring substrate, method of manufacturing the same, and semiconductor device Sep 4, 2008 Issued
Array ( [id] => 112244 [patent_doc_number] => 07713753 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-05-11 [patent_title] => 'Dual-level self-assembled patterning method and apparatus fabricated using the method' [patent_app_type] => utility [patent_app_number] => 12/203958 [patent_app_country] => US [patent_app_date] => 2008-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 16 [patent_no_of_words] => 3521 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/713/07713753.pdf [firstpage_image] =>[orig_patent_app_number] => 12203958 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/203958
Dual-level self-assembled patterning method and apparatus fabricated using the method Sep 3, 2008 Issued
Array ( [id] => 5268630 [patent_doc_number] => 20090072405 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-03-19 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 12/230618 [patent_app_country] => US [patent_app_date] => 2008-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3687 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0072/20090072405.pdf [firstpage_image] =>[orig_patent_app_number] => 12230618 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/230618
Semiconductor device Sep 1, 2008 Issued
Menu