
Roy Karl Potter
Examiner (ID: 13991, Phone: (571)272-1842 , Office: P/2822 )
| Most Active Art Unit | 2822 |
| Art Unit(s) | 2822, 2508, 2811, 3621 |
| Total Applications | 2584 |
| Issued Applications | 2409 |
| Pending Applications | 46 |
| Abandoned Applications | 141 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 9962255
[patent_doc_number] => RE045481
[patent_country] => US
[patent_kind] => E1
[patent_issue_date] => 2015-04-21
[patent_title] => 'Interconnector line of thin film, sputter target for forming the wiring film and electronic component using the same'
[patent_app_type] => reissue
[patent_app_number] => 11/386117
[patent_app_country] => US
[patent_app_date] => 2006-03-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 8
[patent_no_of_words] => 11369
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 0
[patent_words_short_claim] => 49
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11386117
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/386117 | Interconnector line of thin film, sputter target for forming the wiring film and electronic component using the same | Mar 21, 2006 | Issued |
| 11/386116 | Interconnector line of thin film, sputter target for forming the wiring film and electronic component using the same | Mar 21, 2006 | Abandoned |
Array
(
[id] => 5874481
[patent_doc_number] => 20060166400
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-07-27
[patent_title] => 'Electronic assembly with integrated IO and power contacts'
[patent_app_type] => utility
[patent_app_number] => 11/384964
[patent_app_country] => US
[patent_app_date] => 2006-03-20
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/384964 | Electronic assembly with integrated IO and power contacts | Mar 19, 2006 | Issued |
Array
(
[id] => 5593941
[patent_doc_number] => 20060157857
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-07-20
[patent_title] => 'Metal capped copper interconnect'
[patent_app_type] => utility
[patent_app_number] => 11/376199
[patent_app_country] => US
[patent_app_date] => 2006-03-16
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[firstpage_image] =>[orig_patent_app_number] => 11376199
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/376199 | Metal capped copper interconnect | Mar 15, 2006 | Issued |
Array
(
[id] => 5869119
[patent_doc_number] => 20060163736
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-07-27
[patent_title] => 'Interconnections having double capping layer and method for forming the same'
[patent_app_type] => utility
[patent_app_number] => 11/367790
[patent_app_country] => US
[patent_app_date] => 2006-03-03
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/367790 | Interconnections having double capping layer and method for forming the same | Mar 2, 2006 | Issued |
Array
(
[id] => 5038138
[patent_doc_number] => 20070090420
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-04-26
[patent_title] => 'PIXEL ARRAY'
[patent_app_type] => utility
[patent_app_number] => 11/358967
[patent_app_country] => US
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[patent_effective_date] => 0000-00-00
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[firstpage_image] =>[orig_patent_app_number] => 11358967
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/358967 | Pixel array | Feb 20, 2006 | Issued |
Array
(
[id] => 5110499
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[patent_title] => 'Method for providing and removing discharging interconnect for chip-on-glass output leads and structures thereof'
[patent_app_type] => utility
[patent_app_number] => 11/358997
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Array
(
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[patent_title] => 'Localized slots for stress relieve in copper'
[patent_app_type] => utility
[patent_app_number] => 11/357696
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/357696 | Localized slots for stress relieve in copper | Feb 16, 2006 | Issued |
Array
(
[id] => 5869118
[patent_doc_number] => 20060163735
[patent_country] => US
[patent_kind] => A1
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[patent_title] => 'Damascene process at semiconductor substrate level'
[patent_app_type] => utility
[patent_app_number] => 11/357697
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/357697 | Damascene process at semiconductor substrate level | Feb 16, 2006 | Issued |
Array
(
[id] => 5066713
[patent_doc_number] => 20070187814
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[patent_title] => 'System and method for routing supply voltages or other signals between side-by-side die and a lead frame for system in a package (SIP) devices'
[patent_app_type] => utility
[patent_app_number] => 11/352167
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[firstpage_image] =>[orig_patent_app_number] => 11352167
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/352167 | System and method for routing supply voltages or other signals between side-by-side die and a lead frame for system in a package (SIP) devices | Feb 9, 2006 | Issued |
Array
(
[id] => 5703239
[patent_doc_number] => 20060192286
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[patent_kind] => A1
[patent_issue_date] => 2006-08-31
[patent_title] => 'Semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 11/341067
[patent_app_country] => US
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[firstpage_image] =>[orig_patent_app_number] => 11341067
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/341067 | Semiconductor device | Jan 26, 2006 | Issued |
Array
(
[id] => 419093
[patent_doc_number] => 07276768
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[patent_title] => 'Semiconductor structures for latch-up suppression and methods of forming such semiconductor structures'
[patent_app_type] => utility
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/340737 | Semiconductor structures for latch-up suppression and methods of forming such semiconductor structures | Jan 25, 2006 | Issued |
Array
(
[id] => 881242
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[patent_issue_date] => 2008-04-08
[patent_title] => 'Interposer and method for fabricating the same'
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Array
(
[id] => 322987
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/338867 | Substrate for an FBGA semiconductor component | Jan 23, 2006 | Issued |
Array
(
[id] => 5838262
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[patent_title] => 'Method of wet etching vias and articles formed thereby'
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Array
(
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Array
(
[id] => 4564608
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[patent_title] => 'Remote chip attachment'
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Array
(
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Array
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/275497 | CMOS sensors having charge pushing regions | Jan 9, 2006 | Issued |