Search

Roy Karl Potter

Examiner (ID: 13991, Phone: (571)272-1842 , Office: P/2822 )

Most Active Art Unit
2822
Art Unit(s)
2822, 2508, 2811, 3621
Total Applications
2584
Issued Applications
2409
Pending Applications
46
Abandoned Applications
141

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 303961 [patent_doc_number] => 07535101 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-05-19 [patent_title] => 'Electrode pad on conductive semiconductor substrate' [patent_app_type] => utility [patent_app_number] => 10/576627 [patent_app_country] => US [patent_app_date] => 2005-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 17 [patent_no_of_words] => 9553 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/535/07535101.pdf [firstpage_image] =>[orig_patent_app_number] => 10576627 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/576627
Electrode pad on conductive semiconductor substrate May 17, 2005 Issued
Array ( [id] => 911411 [patent_doc_number] => 07329954 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-02-12 [patent_title] => 'Top layers of metal for high performance IC\'s' [patent_app_type] => utility [patent_app_number] => 11/130917 [patent_app_country] => US [patent_app_date] => 2005-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 5742 [patent_no_of_claims] => 95 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 231 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/329/07329954.pdf [firstpage_image] =>[orig_patent_app_number] => 11130917 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/130917
Top layers of metal for high performance IC's May 16, 2005 Issued
Array ( [id] => 690383 [patent_doc_number] => 07074636 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-07-11 [patent_title] => 'Methods and apparatus for attaching getters to MEMS device housings' [patent_app_type] => utility [patent_app_number] => 11/127388 [patent_app_country] => US [patent_app_date] => 2005-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3900 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/074/07074636.pdf [firstpage_image] =>[orig_patent_app_number] => 11127388 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/127388
Methods and apparatus for attaching getters to MEMS device housings May 11, 2005 Issued
Array ( [id] => 7162261 [patent_doc_number] => 20050200020 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-09-15 [patent_title] => 'Method of forming smooth polycrystalline silicon electrodes for molecular electronic devices' [patent_app_type] => utility [patent_app_number] => 11/127917 [patent_app_country] => US [patent_app_date] => 2005-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4863 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0200/20050200020.pdf [firstpage_image] =>[orig_patent_app_number] => 11127917 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/127917
Method of forming smooth polycrystalline silicon electrodes for molecular electronic devices May 10, 2005 Issued
Array ( [id] => 5659231 [patent_doc_number] => 20060249827 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-09 [patent_title] => 'METHOD AND APPARATUS FOR FORMING STACKED DIE AND SUBSTRATE STRUCTURES FOR INCREASED PACKING DENSITY' [patent_app_type] => utility [patent_app_number] => 10/908277 [patent_app_country] => US [patent_app_date] => 2005-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3011 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0249/20060249827.pdf [firstpage_image] =>[orig_patent_app_number] => 10908277 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/908277
Method and apparatus for forming stacked die and substrate structures for increased packing density May 4, 2005 Issued
Array ( [id] => 7176705 [patent_doc_number] => 20050189636 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-09-01 [patent_title] => 'Packaging substrates for integrated circuits and soldering methods' [patent_app_type] => utility [patent_app_number] => 11/123532 [patent_app_country] => US [patent_app_date] => 2005-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7220 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0189/20050189636.pdf [firstpage_image] =>[orig_patent_app_number] => 11123532 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/123532
Packaging substrates for integrated circuits and soldering methods May 4, 2005 Issued
Array ( [id] => 474065 [patent_doc_number] => 07230322 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-06-12 [patent_title] => 'Semiconductor device and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/119745 [patent_app_country] => US [patent_app_date] => 2005-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 30 [patent_no_of_words] => 10964 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/230/07230322.pdf [firstpage_image] =>[orig_patent_app_number] => 11119745 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/119745
Semiconductor device and method of manufacturing the same May 2, 2005 Issued
Array ( [id] => 5661581 [patent_doc_number] => 20060252177 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-09 [patent_title] => 'Semiconductor package with selective underfill and fabrication method therfor' [patent_app_type] => utility [patent_app_number] => 11/121847 [patent_app_country] => US [patent_app_date] => 2005-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2967 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0252/20060252177.pdf [firstpage_image] =>[orig_patent_app_number] => 11121847 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/121847
Semiconductor package with selective underfill and fabrication method therfor May 2, 2005 Issued
Array ( [id] => 820906 [patent_doc_number] => 07408240 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-08-05 [patent_title] => 'Memory device' [patent_app_type] => utility [patent_app_number] => 11/120007 [patent_app_country] => US [patent_app_date] => 2005-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 24 [patent_no_of_words] => 5909 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/408/07408240.pdf [firstpage_image] =>[orig_patent_app_number] => 11120007 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/120007
Memory device May 1, 2005 Issued
Array ( [id] => 7214630 [patent_doc_number] => 20050253271 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-11-17 [patent_title] => 'Semiconductor apparatus' [patent_app_type] => utility [patent_app_number] => 11/115407 [patent_app_country] => US [patent_app_date] => 2005-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 6992 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0253/20050253271.pdf [firstpage_image] =>[orig_patent_app_number] => 11115407 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/115407
Semiconductor apparatus Apr 26, 2005 Issued
Array ( [id] => 425491 [patent_doc_number] => 07271474 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-09-18 [patent_title] => 'Method and integrated circuits of module packing' [patent_app_type] => utility [patent_app_number] => 11/111727 [patent_app_country] => US [patent_app_date] => 2005-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1395 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/271/07271474.pdf [firstpage_image] =>[orig_patent_app_number] => 11111727 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/111727
Method and integrated circuits of module packing Apr 21, 2005 Issued
Array ( [id] => 6942619 [patent_doc_number] => 20050194667 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-09-08 [patent_title] => 'Semiconductor package free of substrate and fabrication method thereof' [patent_app_type] => utility [patent_app_number] => 11/112108 [patent_app_country] => US [patent_app_date] => 2005-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4697 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0194/20050194667.pdf [firstpage_image] =>[orig_patent_app_number] => 11112108 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/112108
Semiconductor package free of substrate and fabrication method thereof Apr 20, 2005 Issued
Array ( [id] => 889195 [patent_doc_number] => 07348682 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-03-25 [patent_title] => 'Method and structures for indexing dice' [patent_app_type] => utility [patent_app_number] => 11/109977 [patent_app_country] => US [patent_app_date] => 2005-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 7860 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/348/07348682.pdf [firstpage_image] =>[orig_patent_app_number] => 11109977 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/109977
Method and structures for indexing dice Apr 18, 2005 Issued
Array ( [id] => 571001 [patent_doc_number] => 07466020 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-12-16 [patent_title] => 'Power module' [patent_app_type] => utility [patent_app_number] => 11/568087 [patent_app_country] => US [patent_app_date] => 2005-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 2395 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/466/07466020.pdf [firstpage_image] =>[orig_patent_app_number] => 11568087 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/568087
Power module Apr 13, 2005 Issued
Array ( [id] => 559967 [patent_doc_number] => 07161224 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-01-09 [patent_title] => 'Complete device layer transfer without edge exclusion via direct wafer bonding and constrained bond-strengthening process' [patent_app_type] => utility [patent_app_number] => 11/103217 [patent_app_country] => US [patent_app_date] => 2005-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 1005 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 37 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/161/07161224.pdf [firstpage_image] =>[orig_patent_app_number] => 11103217 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/103217
Complete device layer transfer without edge exclusion via direct wafer bonding and constrained bond-strengthening process Apr 10, 2005 Issued
Array ( [id] => 360083 [patent_doc_number] => 07485962 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-02-03 [patent_title] => 'Semiconductor device, wiring substrate forming method, and substrate processing apparatus' [patent_app_type] => utility [patent_app_number] => 11/097937 [patent_app_country] => US [patent_app_date] => 2005-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 61 [patent_no_of_words] => 12505 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/485/07485962.pdf [firstpage_image] =>[orig_patent_app_number] => 11097937 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/097937
Semiconductor device, wiring substrate forming method, and substrate processing apparatus Mar 31, 2005 Issued
Array ( [id] => 861351 [patent_doc_number] => 07372134 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-05-13 [patent_title] => 'Integrated circuit edge protection method and apparatus' [patent_app_type] => utility [patent_app_number] => 11/096427 [patent_app_country] => US [patent_app_date] => 2005-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 2798 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/372/07372134.pdf [firstpage_image] =>[orig_patent_app_number] => 11096427 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/096427
Integrated circuit edge protection method and apparatus Mar 30, 2005 Issued
Array ( [id] => 5751076 [patent_doc_number] => 20060220225 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-10-05 [patent_title] => 'SEMICONDUCTOR PACKAGES AND METHODS OF MANUFACTURING THEREOF' [patent_app_type] => utility [patent_app_number] => 10/907327 [patent_app_country] => US [patent_app_date] => 2005-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2821 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0220/20060220225.pdf [firstpage_image] =>[orig_patent_app_number] => 10907327 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/907327
Semiconductor packages and methods of manufacturing thereof Mar 28, 2005 Issued
Array ( [id] => 609903 [patent_doc_number] => 07151287 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-12-19 [patent_title] => 'Minimizing the effect of directly converted x-rays in x-ray imagers' [patent_app_type] => utility [patent_app_number] => 11/089737 [patent_app_country] => US [patent_app_date] => 2005-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3590 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/151/07151287.pdf [firstpage_image] =>[orig_patent_app_number] => 11089737 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/089737
Minimizing the effect of directly converted x-rays in x-ray imagers Mar 24, 2005 Issued
Array ( [id] => 7036786 [patent_doc_number] => 20050156220 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-07-21 [patent_title] => 'Semiconductor device and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/081679 [patent_app_country] => US [patent_app_date] => 2005-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 18082 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0156/20050156220.pdf [firstpage_image] =>[orig_patent_app_number] => 11081679 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/081679
Semiconductor device and method of manufacturing the same Mar 16, 2005 Abandoned
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