
Roy Karl Potter
Examiner (ID: 13991, Phone: (571)272-1842 , Office: P/2822 )
| Most Active Art Unit | 2822 |
| Art Unit(s) | 2822, 2508, 2811, 3621 |
| Total Applications | 2584 |
| Issued Applications | 2409 |
| Pending Applications | 46 |
| Abandoned Applications | 141 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 5791036
[patent_doc_number] => 20060012053
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-01-19
[patent_title] => 'Flip-chip packaged SMD-type LED with antistatic function and having no wire bonding'
[patent_app_type] => utility
[patent_app_number] => 10/982767
[patent_app_country] => US
[patent_app_date] => 2004-11-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 2424
[patent_no_of_claims] => 35
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0012/20060012053.pdf
[firstpage_image] =>[orig_patent_app_number] => 10982767
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/982767 | Flip-chip packaged SMD-type LED with antistatic function and having no wire bonding | Nov 7, 2004 | Issued |
Array
(
[id] => 7154635
[patent_doc_number] => 20050082689
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-04-21
[patent_title] => 'Resin-sealed semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 10/981472
[patent_app_country] => US
[patent_app_date] => 2004-11-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3182
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0082/20050082689.pdf
[firstpage_image] =>[orig_patent_app_number] => 10981472
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/981472 | Resin-sealed semiconductor device | Nov 4, 2004 | Issued |
Array
(
[id] => 5790963
[patent_doc_number] => 20060012017
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-01-19
[patent_title] => 'Semiconductor device and method of manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 10/981557
[patent_app_country] => US
[patent_app_date] => 2004-11-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 26
[patent_figures_cnt] => 26
[patent_no_of_words] => 9812
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0012/20060012017.pdf
[firstpage_image] =>[orig_patent_app_number] => 10981557
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/981557 | Semiconductor device and method of manufacturing the same | Nov 4, 2004 | Issued |
Array
(
[id] => 637785
[patent_doc_number] => 07125746
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-10-24
[patent_title] => 'Flip-chip sub-assembly, methods of making same and device including same'
[patent_app_type] => utility
[patent_app_number] => 10/981477
[patent_app_country] => US
[patent_app_date] => 2004-11-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 8
[patent_no_of_words] => 3623
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 90
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/125/07125746.pdf
[firstpage_image] =>[orig_patent_app_number] => 10981477
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/981477 | Flip-chip sub-assembly, methods of making same and device including same | Nov 4, 2004 | Issued |
Array
(
[id] => 530538
[patent_doc_number] => 07183643
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-02-27
[patent_title] => 'Stacked packages and systems incorporating the same'
[patent_app_type] => utility
[patent_app_number] => 10/981067
[patent_app_country] => US
[patent_app_date] => 2004-11-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 18
[patent_no_of_words] => 10764
[patent_no_of_claims] => 50
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 146
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/183/07183643.pdf
[firstpage_image] =>[orig_patent_app_number] => 10981067
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/981067 | Stacked packages and systems incorporating the same | Nov 3, 2004 | Issued |
Array
(
[id] => 7008440
[patent_doc_number] => 20050062156
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-03-24
[patent_title] => 'Integrating chip scale packaging metallization into integrated circuit die structures'
[patent_app_type] => utility
[patent_app_number] => 10/980536
[patent_app_country] => US
[patent_app_date] => 2004-11-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4343
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0062/20050062156.pdf
[firstpage_image] =>[orig_patent_app_number] => 10980536
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/980536 | Integrating chip scale packaging metallization into integrated circuit die structures | Nov 2, 2004 | Issued |
Array
(
[id] => 6903489
[patent_doc_number] => 20050098884
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-05-12
[patent_title] => 'Semiconductor package'
[patent_app_type] => utility
[patent_app_number] => 10/978327
[patent_app_country] => US
[patent_app_date] => 2004-11-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 4329
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0098/20050098884.pdf
[firstpage_image] =>[orig_patent_app_number] => 10978327
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/978327 | Semiconductor package | Oct 31, 2004 | Issued |
Array
(
[id] => 6949897
[patent_doc_number] => 20050224991
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-10-13
[patent_title] => 'Bump for semiconductor package, semiconductor package applying the bump, and method for fabricating the semiconductor package'
[patent_app_type] => utility
[patent_app_number] => 10/976427
[patent_app_country] => US
[patent_app_date] => 2004-10-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 4549
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0224/20050224991.pdf
[firstpage_image] =>[orig_patent_app_number] => 10976427
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/976427 | Bump for semiconductor package, semiconductor package applying the bump, and method for fabricating the semiconductor package | Oct 28, 2004 | Issued |
Array
(
[id] => 624005
[patent_doc_number] => 07138715
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-11-21
[patent_title] => 'Interconnect, interconnect forming method, thin film transistor, and display device'
[patent_app_type] => utility
[patent_app_number] => 10/974722
[patent_app_country] => US
[patent_app_date] => 2004-10-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 39
[patent_no_of_words] => 9656
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 131
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/138/07138715.pdf
[firstpage_image] =>[orig_patent_app_number] => 10974722
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/974722 | Interconnect, interconnect forming method, thin film transistor, and display device | Oct 27, 2004 | Issued |
Array
(
[id] => 7101470
[patent_doc_number] => 20050104196
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-05-19
[patent_title] => 'Semiconductor package'
[patent_app_type] => utility
[patent_app_number] => 10/974727
[patent_app_country] => US
[patent_app_date] => 2004-10-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 8036
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0104/20050104196.pdf
[firstpage_image] =>[orig_patent_app_number] => 10974727
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/974727 | Semiconductor package | Oct 27, 2004 | Abandoned |
Array
(
[id] => 7125174
[patent_doc_number] => 20050056918
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-03-17
[patent_title] => 'Power module package having improved heat dissipating capability'
[patent_app_type] => utility
[patent_app_number] => 10/974357
[patent_app_country] => US
[patent_app_date] => 2004-10-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 4274
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0056/20050056918.pdf
[firstpage_image] =>[orig_patent_app_number] => 10974357
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/974357 | Power module package having improved heat dissipating capability | Oct 25, 2004 | Issued |
Array
(
[id] => 463371
[patent_doc_number] => 07238602
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-07-03
[patent_title] => 'Chip-size package structure and method of the same'
[patent_app_type] => utility
[patent_app_number] => 10/973557
[patent_app_country] => US
[patent_app_date] => 2004-10-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 7
[patent_no_of_words] => 3560
[patent_no_of_claims] => 32
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 146
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/238/07238602.pdf
[firstpage_image] =>[orig_patent_app_number] => 10973557
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/973557 | Chip-size package structure and method of the same | Oct 25, 2004 | Issued |
Array
(
[id] => 7154606
[patent_doc_number] => 20050082678
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-04-21
[patent_title] => 'Method to form selective cap layers on metal features with narrow spaces'
[patent_app_type] => utility
[patent_app_number] => 10/973207
[patent_app_country] => US
[patent_app_date] => 2004-10-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 5127
[patent_no_of_claims] => 39
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0082/20050082678.pdf
[firstpage_image] =>[orig_patent_app_number] => 10973207
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/973207 | Method to form selective cap layers on metal features with narrow spaces | Oct 25, 2004 | Abandoned |
Array
(
[id] => 7198893
[patent_doc_number] => 20050051898
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-03-10
[patent_title] => 'Semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 10/970027
[patent_app_country] => US
[patent_app_date] => 2004-10-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 38
[patent_figures_cnt] => 38
[patent_no_of_words] => 14849
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0051/20050051898.pdf
[firstpage_image] =>[orig_patent_app_number] => 10970027
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/970027 | Semiconductor device | Oct 21, 2004 | Issued |
Array
(
[id] => 6988808
[patent_doc_number] => 20050087881
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-04-28
[patent_title] => 'Electronic device'
[patent_app_type] => utility
[patent_app_number] => 10/970527
[patent_app_country] => US
[patent_app_date] => 2004-10-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 4534
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0087/20050087881.pdf
[firstpage_image] =>[orig_patent_app_number] => 10970527
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/970527 | Electronic device | Oct 20, 2004 | Issued |
Array
(
[id] => 928771
[patent_doc_number] => 07315081
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-01-01
[patent_title] => 'Semiconductor device package utilizing proud interconnect material'
[patent_app_type] => utility
[patent_app_number] => 10/970557
[patent_app_country] => US
[patent_app_date] => 2004-10-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 19
[patent_no_of_words] => 6119
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 83
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/315/07315081.pdf
[firstpage_image] =>[orig_patent_app_number] => 10970557
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/970557 | Semiconductor device package utilizing proud interconnect material | Oct 20, 2004 | Issued |
Array
(
[id] => 484493
[patent_doc_number] => 07221046
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-05-22
[patent_title] => 'System to control effective series resistance of power delivery circuit'
[patent_app_type] => utility
[patent_app_number] => 10/970237
[patent_app_country] => US
[patent_app_date] => 2004-10-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 1830
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 93
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/221/07221046.pdf
[firstpage_image] =>[orig_patent_app_number] => 10970237
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/970237 | System to control effective series resistance of power delivery circuit | Oct 20, 2004 | Issued |
Array
(
[id] => 6923458
[patent_doc_number] => 20050236713
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-10-27
[patent_title] => 'Semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 10/968167
[patent_app_country] => US
[patent_app_date] => 2004-10-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 33
[patent_figures_cnt] => 33
[patent_no_of_words] => 9177
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0236/20050236713.pdf
[firstpage_image] =>[orig_patent_app_number] => 10968167
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/968167 | Semiconductor device | Oct 19, 2004 | Issued |
Array
(
[id] => 530406
[patent_doc_number] => 07183631
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-02-27
[patent_title] => 'Package structure module of bump posited type lead frame'
[patent_app_type] => utility
[patent_app_number] => 10/968187
[patent_app_country] => US
[patent_app_date] => 2004-10-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 10
[patent_no_of_words] => 1806
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 40
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/183/07183631.pdf
[firstpage_image] =>[orig_patent_app_number] => 10968187
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/968187 | Package structure module of bump posited type lead frame | Oct 19, 2004 | Issued |
Array
(
[id] => 1002401
[patent_doc_number] => 06908855
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-06-21
[patent_title] => 'Plating tail design for IC packages'
[patent_app_type] => utility
[patent_app_number] => 10/969133
[patent_app_country] => US
[patent_app_date] => 2004-10-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 1555
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 128
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/908/06908855.pdf
[firstpage_image] =>[orig_patent_app_number] => 10969133
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/969133 | Plating tail design for IC packages | Oct 18, 2004 | Issued |