
Roy Karl Potter
Examiner (ID: 13991, Phone: (571)272-1842 , Office: P/2822 )
| Most Active Art Unit | 2822 |
| Art Unit(s) | 2822, 2508, 2811, 3621 |
| Total Applications | 2584 |
| Issued Applications | 2409 |
| Pending Applications | 46 |
| Abandoned Applications | 141 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 591232
[patent_doc_number] => 07439585
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-10-21
[patent_title] => 'Silicon-on-insulator device'
[patent_app_type] => utility
[patent_app_number] => 10/560067
[patent_app_country] => US
[patent_app_date] => 2004-06-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 1309
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 38
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/439/07439585.pdf
[firstpage_image] =>[orig_patent_app_number] => 10560067
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/560067 | Silicon-on-insulator device | Jun 7, 2004 | Issued |
Array
(
[id] => 790511
[patent_doc_number] => 06984531
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-01-10
[patent_title] => 'Electrical field alignment vernier'
[patent_app_type] => utility
[patent_app_number] => 10/858636
[patent_app_country] => US
[patent_app_date] => 2004-06-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
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[patent_no_of_words] => 2145
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/984/06984531.pdf
[firstpage_image] =>[orig_patent_app_number] => 10858636
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/858636 | Electrical field alignment vernier | May 31, 2004 | Issued |
Array
(
[id] => 7080504
[patent_doc_number] => 20050045884
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-03-03
[patent_title] => 'Semiconductor device, method of fabricating same, and electrooptical device'
[patent_app_type] => utility
[patent_app_number] => 10/852124
[patent_app_country] => US
[patent_app_date] => 2004-05-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[patent_no_of_words] => 3079
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[pdf_file] => publications/A1/0045/20050045884.pdf
[firstpage_image] =>[orig_patent_app_number] => 10852124
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/852124 | Semiconductor device, method of fabricating same, and electrooptical device | May 24, 2004 | Issued |
Array
(
[id] => 742997
[patent_doc_number] => 07030497
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-04-18
[patent_title] => 'Localized slots for stress relieve in copper'
[patent_app_type] => utility
[patent_app_number] => 10/845887
[patent_app_country] => US
[patent_app_date] => 2004-05-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/030/07030497.pdf
[firstpage_image] =>[orig_patent_app_number] => 10845887
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/845887 | Localized slots for stress relieve in copper | May 13, 2004 | Issued |
Array
(
[id] => 664138
[patent_doc_number] => 07102222
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-09-05
[patent_title] => 'Conductive trace structure and semiconductor package having the conductive trace structure'
[patent_app_type] => utility
[patent_app_number] => 10/846427
[patent_app_country] => US
[patent_app_date] => 2004-05-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[patent_no_of_words] => 3129
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/102/07102222.pdf
[firstpage_image] =>[orig_patent_app_number] => 10846427
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/846427 | Conductive trace structure and semiconductor package having the conductive trace structure | May 13, 2004 | Issued |
Array
(
[id] => 7407629
[patent_doc_number] => 20040227253
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-11-18
[patent_title] => 'Flip chip package, circuit board thereof and packaging method thereof'
[patent_app_type] => new
[patent_app_number] => 10/839157
[patent_app_country] => US
[patent_app_date] => 2004-05-06
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[pdf_file] => publications/A1/0227/20040227253.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/839157 | Flip chip package, circuit board thereof and packaging method thereof | May 5, 2004 | Issued |
Array
(
[id] => 703152
[patent_doc_number] => 07064424
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-06-20
[patent_title] => 'Optical surface mount technology package'
[patent_app_type] => utility
[patent_app_number] => 10/841897
[patent_app_country] => US
[patent_app_date] => 2004-05-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[patent_no_of_words] => 1215
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[pdf_file] => patents/07/064/07064424.pdf
[firstpage_image] =>[orig_patent_app_number] => 10841897
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/841897 | Optical surface mount technology package | May 5, 2004 | Issued |
Array
(
[id] => 721351
[patent_doc_number] => 07049704
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-05-23
[patent_title] => 'Flip-chip package integrating optical and electrical devices and coupling to a waveguide on a board'
[patent_app_type] => utility
[patent_app_number] => 10/840017
[patent_app_country] => US
[patent_app_date] => 2004-05-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[patent_no_of_words] => 4329
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/049/07049704.pdf
[firstpage_image] =>[orig_patent_app_number] => 10840017
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/840017 | Flip-chip package integrating optical and electrical devices and coupling to a waveguide on a board | May 5, 2004 | Issued |
Array
(
[id] => 616825
[patent_doc_number] => 07145238
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2006-12-05
[patent_title] => 'Semiconductor package and substrate having multi-level vias'
[patent_app_type] => utility
[patent_app_number] => 10/839647
[patent_app_country] => US
[patent_app_date] => 2004-05-05
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/07/145/07145238.pdf
[firstpage_image] =>[orig_patent_app_number] => 10839647
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/839647 | Semiconductor package and substrate having multi-level vias | May 4, 2004 | Issued |
Array
(
[id] => 634569
[patent_doc_number] => 07129569
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-10-31
[patent_title] => 'Large die package structures and fabrication method therefor'
[patent_app_type] => utility
[patent_app_number] => 10/837347
[patent_app_country] => US
[patent_app_date] => 2004-04-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[pdf_file] => patents/07/129/07129569.pdf
[firstpage_image] =>[orig_patent_app_number] => 10837347
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/837347 | Large die package structures and fabrication method therefor | Apr 29, 2004 | Issued |
Array
(
[id] => 7273083
[patent_doc_number] => 20040232534
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-11-25
[patent_title] => 'Packaging component and semiconductor package'
[patent_app_type] => new
[patent_app_number] => 10/835007
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[pdf_file] => publications/A1/0232/20040232534.pdf
[firstpage_image] =>[orig_patent_app_number] => 10835007
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/835007 | Packaging component and semiconductor package | Apr 29, 2004 | Issued |
Array
(
[id] => 7404409
[patent_doc_number] => 20040262645
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-12-30
[patent_title] => 'Radio frequency microelectromechanical systems (MEMS) devices on low-temperature co-fired ceramic (LTCC) substrates'
[patent_app_type] => new
[patent_app_number] => 10/835590
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[pdf_file] => publications/A1/0262/20040262645.pdf
[firstpage_image] =>[orig_patent_app_number] => 10835590
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/835590 | Phased array antenna using (MEMS) devices on low-temperature co-fired ceramic (LTCC) substrates | Apr 29, 2004 | Issued |
Array
(
[id] => 637784
[patent_doc_number] => 07125745
[patent_country] => US
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[patent_issue_date] => 2006-10-24
[patent_title] => 'Multi-chip package substrate for flip-chip and wire bonding'
[patent_app_type] => utility
[patent_app_number] => 10/833087
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Array
(
[id] => 655815
[patent_doc_number] => 07109571
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[patent_issue_date] => 2006-09-19
[patent_title] => 'Method of forming a hermetic seal for silicon die with metal feed through structure'
[patent_app_type] => utility
[patent_app_number] => 10/832786
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Array
(
[id] => 979378
[patent_doc_number] => 06930384
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[patent_issue_date] => 2005-08-16
[patent_title] => 'Tape carrier package'
[patent_app_type] => utility
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[patent_app_country] => US
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[firstpage_image] =>[orig_patent_app_number] => 10831340
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/831340 | Tape carrier package | Apr 25, 2004 | Issued |
Array
(
[id] => 7348897
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Array
(
[id] => 6949856
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[patent_title] => 'Integrated circuit adapted for ECO and FIB debug'
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/820517 | Terahertz frequency band wavelength selector | Apr 7, 2004 | Issued |
Array
(
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Array
(
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[pdf_file] => patents/07/053/07053469.pdf
[firstpage_image] =>[orig_patent_app_number] => 10811857
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/811857 | Leadless semiconductor package and manufacturing method thereof | Mar 29, 2004 | Issued |