Roy Karl Potter

Array ( [id] => 732768 [patent_doc_number] => 07037835 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-05-02 [patent_title] => 'Interconnections having double capping layer and method for forming the same' [patent_app_type] => utility [patent_app_number] => 10/744277 [patent_app_country] => US [patent_app_date] => 2003-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3538 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/037/07037835.pdf [firstpage_image] =>[orig_patent_app_number] => 10744277 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 783475 [patent_doc_number] => 06992384 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-01-31 [patent_title] => 'High performance multi-chip flip chip package' [patent_app_type] => utility [patent_app_number] => 10/741217 [patent_app_country] => US [patent_app_date] => 2003-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 3743 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/992/06992384.pdf [firstpage_image] =>[orig_patent_app_number] => 10741217 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7304949 [patent_doc_number] => 20040140544 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-07-22 [patent_title] => 'Semiconductor device' [patent_app_type] => new [patent_app_number] => 10/741637 [patent_app_country] => US [patent_app_date] => 2003-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 4842 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0140/20040140544.pdf [firstpage_image] =>[orig_patent_app_number] => 10741637 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 979029 [patent_doc_number] => 06930033 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-16 [patent_title] => 'Treating surface of low-dielectric constant material to achieve good mechanical strength' [patent_app_type] => utility [patent_app_number] => 10/740337 [patent_app_country] => US [patent_app_date] => 2003-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 5657 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/930/06930033.pdf [firstpage_image] =>[orig_patent_app_number] => 10740337 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 725909 [patent_doc_number] => 07045896 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-05-16 [patent_title] => 'Metal interconnect layer of semiconductor device and method for forming a metal interconnect layer' [patent_app_type] => utility [patent_app_number] => 10/738727 [patent_app_country] => US [patent_app_date] => 2003-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 23 [patent_no_of_words] => 7085 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/045/07045896.pdf [firstpage_image] =>[orig_patent_app_number] => 10738727 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 707703 [patent_doc_number] => 07060601 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-06-13 [patent_title] => 'Packaging substrates for integrated circuits and soldering methods' [patent_app_type] => utility [patent_app_number] => 10/739707 [patent_app_country] => US [patent_app_date] => 2003-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 15 [patent_no_of_words] => 7208 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/060/07060601.pdf [firstpage_image] =>[orig_patent_app_number] => 10739707 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 779629 [patent_doc_number] => 06995466 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-02-07 [patent_title] => 'Semiconductor device having passivation cap and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 10/732377 [patent_app_country] => US [patent_app_date] => 2003-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 15 [patent_no_of_words] => 6344 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/995/06995466.pdf [firstpage_image] =>[orig_patent_app_number] => 10732377 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7323452 [patent_doc_number] => 20040251517 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-16 [patent_title] => 'Semiconductor device and method of manufacturing the same' [patent_app_type] => new [patent_app_number] => 10/732517 [patent_app_country] => US [patent_app_date] => 2003-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 167 [patent_figures_cnt] => 167 [patent_no_of_words] => 26813 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 402 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0251/20040251517.pdf [firstpage_image] =>[orig_patent_app_number] => 10732517 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 725923 [patent_doc_number] => 07045904 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-05-16 [patent_title] => 'Patterned plasma treatment to improve distribution of underfill material' [patent_app_type] => utility [patent_app_number] => 10/732567 [patent_app_country] => US [patent_app_date] => 2003-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 5072 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/045/07045904.pdf [firstpage_image] =>[orig_patent_app_number] => 10732567 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7304952 [patent_doc_number] => 20040140547 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-07-22 [patent_title] => 'Semiconductor chip and method for manufacturing the same' [patent_app_type] => new [patent_app_number] => 10/730047 [patent_app_country] => US [patent_app_date] => 2003-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 17728 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0140/20040140547.pdf [firstpage_image] =>[orig_patent_app_number] => 10730047 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 694620 [patent_doc_number] => 07071013 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-07-04 [patent_title] => 'Fixture and method for uniform electroless metal deposition on integrated circuit bond pads' [patent_app_type] => utility [patent_app_number] => 10/731907 [patent_app_country] => US [patent_app_date] => 2003-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 3235 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/071/07071013.pdf [firstpage_image] =>[orig_patent_app_number] => 10731907 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7334193 [patent_doc_number] => 20040188819 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-30 [patent_title] => 'Wafer level methods for fabricating multi-dice chip scale semiconductor components' [patent_app_type] => new [patent_app_number] => 10/730333 [patent_app_country] => US [patent_app_date] => 2003-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 14816 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 3 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0188/20040188819.pdf [firstpage_image] =>[orig_patent_app_number] => 10730333 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 988162 [patent_doc_number] => 06921717 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-07-26 [patent_title] => 'Method for forming metal lines' [patent_app_type] => utility [patent_app_number] => 10/730197 [patent_app_country] => US [patent_app_date] => 2003-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 2521 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/921/06921717.pdf [firstpage_image] =>[orig_patent_app_number] => 10730197 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7169175 [patent_doc_number] => 20050121758 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-09 [patent_title] => 'Thin package for stacking integrated circuits' [patent_app_type] => utility [patent_app_number] => 10/729557 [patent_app_country] => US [patent_app_date] => 2003-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3090 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0121/20050121758.pdf [firstpage_image] =>[orig_patent_app_number] => 10729557 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 931152 [patent_doc_number] => 06979656 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-12-27 [patent_title] => 'Carbon and halogen doped silicate glass dielectric layer and method for fabricating the same' [patent_app_type] => utility [patent_app_number] => 10/729217 [patent_app_country] => US [patent_app_date] => 2003-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 12 [patent_no_of_words] => 4426 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 42 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/979/06979656.pdf [firstpage_image] =>[orig_patent_app_number] => 10729217 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7205179 [patent_doc_number] => 20040070072 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-04-15 [patent_title] => 'Semiconductor device having radiation structure' [patent_app_type] => new [patent_app_number] => 10/699837 [patent_app_country] => US [patent_app_date] => 2003-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 25146 [patent_no_of_claims] => 65 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0070/20040070072.pdf [firstpage_image] =>[orig_patent_app_number] => 10699837 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 783474 [patent_doc_number] => 06992383 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-01-31 [patent_title] => 'Semiconductor device having radiation structure' [patent_app_type] => utility [patent_app_number] => 10/699828 [patent_app_country] => US [patent_app_date] => 2003-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 58 [patent_no_of_words] => 24848 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/992/06992383.pdf [firstpage_image] =>[orig_patent_app_number] => 10699828 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1120930 [patent_doc_number] => 06798062 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-09-28 [patent_title] => 'Semiconductor device having radiation structure' [patent_app_type] => B2 [patent_app_number] => 10/699838 [patent_app_country] => US [patent_app_date] => 2003-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 58 [patent_no_of_words] => 24861 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/798/06798062.pdf [firstpage_image] =>[orig_patent_app_number] => 10699838 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7472253 [patent_doc_number] => 20040097082 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-05-20 [patent_title] => 'Semiconductor device having radiation structure' [patent_app_type] => new [patent_app_number] => 10/699954 [patent_app_country] => US [patent_app_date] => 2003-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 25165 [patent_no_of_claims] => 65 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0097/20040097082.pdf [firstpage_image] =>[orig_patent_app_number] => 10699954 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1018701 [patent_doc_number] => 06891265 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-05-10 [patent_title] => 'Semiconductor device having radiation structure' [patent_app_type] => utility [patent_app_number] => 10/699785 [patent_app_country] => US [patent_app_date] => 2003-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 58 [patent_no_of_words] => 24878 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/891/06891265.pdf [firstpage_image] =>[orig_patent_app_number] => 10699785 [rel_patent_id] =>[rel_patent_doc_number] =>)