Search

Roy Karl Potter

Examiner (ID: 13991, Phone: (571)272-1842 , Office: P/2822 )

Most Active Art Unit
2822
Art Unit(s)
2822, 2508, 2811, 3621
Total Applications
2584
Issued Applications
2409
Pending Applications
46
Abandoned Applications
141

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1216350 [patent_doc_number] => 06706562 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-03-16 [patent_title] => 'Electronic assembly with high capacity thermal spreader and methods of manufacture' [patent_app_type] => B2 [patent_app_number] => 10/036846 [patent_app_country] => US [patent_app_date] => 2001-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 8570 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/706/06706562.pdf [firstpage_image] =>[orig_patent_app_number] => 10036846 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/036846
Electronic assembly with high capacity thermal spreader and methods of manufacture Dec 20, 2001 Issued
Array ( [id] => 6821807 [patent_doc_number] => 20030219968 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-11-27 [patent_title] => 'Sacrificial inlay process for improved integration of porous interlevel dielectrics' [patent_app_type] => new [patent_app_number] => 10/021947 [patent_app_country] => US [patent_app_date] => 2001-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3492 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0219/20030219968.pdf [firstpage_image] =>[orig_patent_app_number] => 10021947 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/021947
Sacrificial inlay process for improved integration of porous interlevel dielectrics Dec 12, 2001 Abandoned
Array ( [id] => 1225159 [patent_doc_number] => 06700183 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-03-02 [patent_title] => 'Low temperature die attaching material for BOC packages and products comprising such material' [patent_app_type] => B2 [patent_app_number] => 10/003260 [patent_app_country] => US [patent_app_date] => 2001-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 3190 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/700/06700183.pdf [firstpage_image] =>[orig_patent_app_number] => 10003260 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/003260
Low temperature die attaching material for BOC packages and products comprising such material Dec 5, 2001 Issued
Array ( [id] => 1340718 [patent_doc_number] => 06593642 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-07-15 [patent_title] => 'Semiconductor device provided with potential transmission line' [patent_app_type] => B2 [patent_app_number] => 09/987257 [patent_app_country] => US [patent_app_date] => 2001-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 19 [patent_no_of_words] => 6603 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/593/06593642.pdf [firstpage_image] =>[orig_patent_app_number] => 09987257 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/987257
Semiconductor device provided with potential transmission line Nov 13, 2001 Issued
Array ( [id] => 1424647 [patent_doc_number] => 06515371 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-02-04 [patent_title] => 'Semiconductor device with elastic structure and wiring' [patent_app_type] => B2 [patent_app_number] => 09/983177 [patent_app_country] => US [patent_app_date] => 2001-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 67 [patent_figures_cnt] => 81 [patent_no_of_words] => 27236 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/515/06515371.pdf [firstpage_image] =>[orig_patent_app_number] => 09983177 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/983177
Semiconductor device with elastic structure and wiring Oct 22, 2001 Issued
Array ( [id] => 5869878 [patent_doc_number] => 20020046764 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-04-25 [patent_title] => 'PV/thermal solar power assembly' [patent_app_type] => new [patent_app_number] => 09/966387 [patent_app_country] => US [patent_app_date] => 2001-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2934 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 28 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0046/20020046764.pdf [firstpage_image] =>[orig_patent_app_number] => 09966387 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/966387
PV/thermal solar power assembly Sep 27, 2001 Issued
Array ( [id] => 1097316 [patent_doc_number] => 06822267 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-11-23 [patent_title] => 'Signal transmission circuit, CMOS semiconductor device, and circuit board' [patent_app_type] => B1 [patent_app_number] => 09/951847 [patent_app_country] => US [patent_app_date] => 2001-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 25 [patent_no_of_words] => 9501 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/822/06822267.pdf [firstpage_image] =>[orig_patent_app_number] => 09951847 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/951847
Signal transmission circuit, CMOS semiconductor device, and circuit board Sep 10, 2001 Issued
Array ( [id] => 1502210 [patent_doc_number] => 06486493 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-11-26 [patent_title] => 'Semiconductor integrated circuit device having hierarchical test interface circuit' [patent_app_type] => B2 [patent_app_number] => 09/942827 [patent_app_country] => US [patent_app_date] => 2001-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 19 [patent_no_of_words] => 15303 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/486/06486493.pdf [firstpage_image] =>[orig_patent_app_number] => 09942827 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/942827
Semiconductor integrated circuit device having hierarchical test interface circuit Aug 30, 2001 Issued
Array ( [id] => 1386956 [patent_doc_number] => 06555897 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-04-29 [patent_title] => 'Assembly for attaching die to leads' [patent_app_type] => B2 [patent_app_number] => 09/944440 [patent_app_country] => US [patent_app_date] => 2001-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 4623 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/555/06555897.pdf [firstpage_image] =>[orig_patent_app_number] => 09944440 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/944440
Assembly for attaching die to leads Aug 29, 2001 Issued
Array ( [id] => 6334517 [patent_doc_number] => 20020033555 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-03-21 [patent_title] => 'Molded component and method of producing the same' [patent_app_type] => new [patent_app_number] => 09/941218 [patent_app_country] => US [patent_app_date] => 2001-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 15630 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0033/20020033555.pdf [firstpage_image] =>[orig_patent_app_number] => 09941218 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/941218
Molded component and method of producing the same Aug 28, 2001 Issued
Array ( [id] => 1302640 [patent_doc_number] => 06620648 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-09-16 [patent_title] => 'Multi-chip module with extension' [patent_app_type] => B2 [patent_app_number] => 09/941315 [patent_app_country] => US [patent_app_date] => 2001-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 1485 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/620/06620648.pdf [firstpage_image] =>[orig_patent_app_number] => 09941315 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/941315
Multi-chip module with extension Aug 28, 2001 Issued
Array ( [id] => 6476548 [patent_doc_number] => 20020024116 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-02-28 [patent_title] => 'Method and apparatus for magnetic shielding of an integrated circuit' [patent_app_type] => new [patent_app_number] => 09/939652 [patent_app_country] => US [patent_app_date] => 2001-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2484 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0024/20020024116.pdf [firstpage_image] =>[orig_patent_app_number] => 09939652 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/939652
Method and apparatus for magnetic shielding of an integrated circuit Aug 27, 2001 Issued
Array ( [id] => 6727669 [patent_doc_number] => 20030183859 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-10-02 [patent_title] => 'Single transistor rare earth manganite ferroelectric nonvolatile memory cell' [patent_app_type] => new [patent_app_number] => 10/362387 [patent_app_country] => US [patent_app_date] => 2003-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3921 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 33 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0183/20030183859.pdf [firstpage_image] =>[orig_patent_app_number] => 10362387 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/362387
Single transistor rare earth manganite ferroelectric nonvolatile memory cell Aug 23, 2001 Issued
Array ( [id] => 6897477 [patent_doc_number] => 20010045642 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-11-29 [patent_title] => 'Die-to-insert permanent connection and method of forming' [patent_app_type] => new [patent_app_number] => 09/915236 [patent_app_country] => US [patent_app_date] => 2001-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4065 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0045/20010045642.pdf [firstpage_image] =>[orig_patent_app_number] => 09915236 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/915236
Die-to-insert permanent connection and method of forming Jul 24, 2001 Issued
Array ( [id] => 1595456 [patent_doc_number] => 06492219 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-12-10 [patent_title] => 'High voltage shield' [patent_app_type] => B2 [patent_app_number] => 09/909757 [patent_app_country] => US [patent_app_date] => 2001-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 1844 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/492/06492219.pdf [firstpage_image] =>[orig_patent_app_number] => 09909757 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/909757
High voltage shield Jul 22, 2001 Issued
Array ( [id] => 5885895 [patent_doc_number] => 20020011676 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-01-31 [patent_title] => 'Semiconductor structure having stacked semiconductor devices' [patent_app_type] => new [patent_app_number] => 09/906284 [patent_app_country] => US [patent_app_date] => 2001-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7769 [patent_no_of_claims] => 61 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0011/20020011676.pdf [firstpage_image] =>[orig_patent_app_number] => 09906284 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/906284
Semiconductor structure having stacked semiconductor devices Jul 15, 2001 Issued
Array ( [id] => 7076940 [patent_doc_number] => 20010040281 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-11-15 [patent_title] => 'Multi-chip memory apparatus and associated method' [patent_app_type] => new [patent_app_number] => 09/894739 [patent_app_country] => US [patent_app_date] => 2001-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3857 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0040/20010040281.pdf [firstpage_image] =>[orig_patent_app_number] => 09894739 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/894739
Multi-chip memory apparatus and associated method Jun 27, 2001 Abandoned
Array ( [id] => 1169362 [patent_doc_number] => 06756622 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-06-29 [patent_title] => 'Vertical gain cell and array for a dynamic random access memory and method for forming the same' [patent_app_type] => B2 [patent_app_number] => 09/879592 [patent_app_country] => US [patent_app_date] => 2001-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6181 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 235 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/756/06756622.pdf [firstpage_image] =>[orig_patent_app_number] => 09879592 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/879592
Vertical gain cell and array for a dynamic random access memory and method for forming the same Jun 11, 2001 Issued
Array ( [id] => 1344343 [patent_doc_number] => 06590292 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-07-08 [patent_title] => 'Thermal and mechanical attachment of a heatspreader to a flip-chip integrated circuit structure using underfill' [patent_app_type] => B1 [patent_app_number] => 09/872327 [patent_app_country] => US [patent_app_date] => 2001-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 4033 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/590/06590292.pdf [firstpage_image] =>[orig_patent_app_number] => 09872327 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/872327
Thermal and mechanical attachment of a heatspreader to a flip-chip integrated circuit structure using underfill May 31, 2001 Issued
Array ( [id] => 1044156 [patent_doc_number] => 06867485 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-03-15 [patent_title] => 'Semiconductor package using terminals formed on a conductive layer of a circuit board' [patent_app_type] => utility [patent_app_number] => 09/866022 [patent_app_country] => US [patent_app_date] => 2001-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 16 [patent_no_of_words] => 2052 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/867/06867485.pdf [firstpage_image] =>[orig_patent_app_number] => 09866022 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/866022
Semiconductor package using terminals formed on a conductive layer of a circuit board May 23, 2001 Issued
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