Roy Karl Potter

Array ( [id] => 4411968 [patent_doc_number] => 06172419 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-09 [patent_title] => 'Low profile ball grid array package' [patent_app_type] => 1 [patent_app_number] => 9/028646 [patent_app_country] => US [patent_app_date] => 1998-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 3546 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/172/06172419.pdf [firstpage_image] =>[orig_patent_app_number] => 028646 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4276893 [patent_doc_number] => 06246083 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-12 [patent_title] => 'Vertical gain cell and array for a dynamic random access memory' [patent_app_type] => 1 [patent_app_number] => 9/028807 [patent_app_country] => US [patent_app_date] => 1998-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6174 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/246/06246083.pdf [firstpage_image] =>[orig_patent_app_number] => 028807 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4091750 [patent_doc_number] => 06018190 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-01-25 [patent_title] => 'I/O card device and method for making the same' [patent_app_type] => 1 [patent_app_number] => 9/028954 [patent_app_country] => US [patent_app_date] => 1998-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 1660 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/018/06018190.pdf [firstpage_image] =>[orig_patent_app_number] => 028954 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1448086 [patent_doc_number] => 06369432 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-09 [patent_title] => 'Enhanced capacitor shape' [patent_app_type] => B1 [patent_app_number] => 09/028050 [patent_app_country] => US [patent_app_date] => 1998-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 19 [patent_no_of_words] => 4089 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/369/06369432.pdf [firstpage_image] =>[orig_patent_app_number] => 09028050 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7627944 [patent_doc_number] => 06806493 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-10-19 [patent_title] => 'Spring element for use in an apparatus for attaching to a semiconductor and a method of attaching' [patent_app_type] => B1 [patent_app_number] => 09/026080 [patent_app_country] => US [patent_app_date] => 1998-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 20 [patent_no_of_words] => 6821 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 14 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/806/06806493.pdf [firstpage_image] =>[orig_patent_app_number] => 09026080 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4105247 [patent_doc_number] => 06066887 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-23 [patent_title] => 'LOC semiconductor package' [patent_app_type] => 1 [patent_app_number] => 9/023707 [patent_app_country] => US [patent_app_date] => 1998-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 14 [patent_no_of_words] => 4447 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/066/06066887.pdf [firstpage_image] =>[orig_patent_app_number] => 023707 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4080021 [patent_doc_number] => 05965903 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-12 [patent_title] => 'Device and method of manufacture for an integrated circuit having a BIST circuit and bond pads incorporated therein' [patent_app_type] => 1 [patent_app_number] => 9/022733 [patent_app_country] => US [patent_app_date] => 1998-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 3870 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/965/05965903.pdf [firstpage_image] =>[orig_patent_app_number] => 022733 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4148160 [patent_doc_number] => 06031284 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-29 [patent_title] => 'Package body and semiconductor chip package using same' [patent_app_type] => 1 [patent_app_number] => 9/021829 [patent_app_country] => US [patent_app_date] => 1998-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 1671 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/031/06031284.pdf [firstpage_image] =>[orig_patent_app_number] => 021829 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4094803 [patent_doc_number] => 06133613 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-17 [patent_title] => 'Anti-reflection oxynitride film for tungsten-silicide substrates' [patent_app_type] => 1 [patent_app_number] => 9/018100 [patent_app_country] => US [patent_app_date] => 1998-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2302 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/133/06133613.pdf [firstpage_image] =>[orig_patent_app_number] => 018100 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4137357 [patent_doc_number] => 06034427 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-07 [patent_title] => 'Ball grid array structure and method for packaging an integrated circuit chip' [patent_app_type] => 1 [patent_app_number] => 9/014693 [patent_app_country] => US [patent_app_date] => 1998-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 24 [patent_no_of_words] => 7791 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/034/06034427.pdf [firstpage_image] =>[orig_patent_app_number] => 014693 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4361397 [patent_doc_number] => 06201301 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-13 [patent_title] => 'Low cost thermally enhanced flip chip BGA' [patent_app_type] => 1 [patent_app_number] => 9/010414 [patent_app_country] => US [patent_app_date] => 1998-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 3388 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/201/06201301.pdf [firstpage_image] =>[orig_patent_app_number] => 010414 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4087191 [patent_doc_number] => 06054767 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-25 [patent_title] => 'Programmable substrate for array-type packages' [patent_app_type] => 1 [patent_app_number] => 9/006584 [patent_app_country] => US [patent_app_date] => 1998-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2963 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/054/06054767.pdf [firstpage_image] =>[orig_patent_app_number] => 006584 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4101913 [patent_doc_number] => 06097081 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-01 [patent_title] => 'Semiconductor device having adhesive between lead and chip' [patent_app_type] => 1 [patent_app_number] => 9/005777 [patent_app_country] => US [patent_app_date] => 1998-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 32 [patent_no_of_words] => 5856 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/097/06097081.pdf [firstpage_image] =>[orig_patent_app_number] => 005777 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4187332 [patent_doc_number] => 06020631 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-01 [patent_title] => 'Method and apparatus for connecting a bondwire to a bondring near a via' [patent_app_type] => 1 [patent_app_number] => 9/003116 [patent_app_country] => US [patent_app_date] => 1998-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 3240 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/020/06020631.pdf [firstpage_image] =>[orig_patent_app_number] => 003116 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4094925 [patent_doc_number] => 06133622 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-17 [patent_title] => 'High speed IC package configuration' [patent_app_type] => 1 [patent_app_number] => 9/001638 [patent_app_country] => US [patent_app_date] => 1997-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7792 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/133/06133622.pdf [firstpage_image] =>[orig_patent_app_number] => 001638 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4222780 [patent_doc_number] => 06111323 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-29 [patent_title] => 'Reworkable thermoplastic encapsulant' [patent_app_type] => 1 [patent_app_number] => 9/000754 [patent_app_country] => US [patent_app_date] => 1997-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 3106 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/111/06111323.pdf [firstpage_image] =>[orig_patent_app_number] => 000754 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1582991 [patent_doc_number] => 06424020 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-23 [patent_title] => 'High Density electronic circuit modules' [patent_app_type] => B1 [patent_app_number] => 08/999352 [patent_app_country] => US [patent_app_date] => 1997-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 65 [patent_no_of_words] => 10276 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/424/06424020.pdf [firstpage_image] =>[orig_patent_app_number] => 08999352 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4324684 [patent_doc_number] => 06249025 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-19 [patent_title] => 'Using epitaxially grown wells for reducing junction capacitances' [patent_app_type] => 1 [patent_app_number] => 8/998257 [patent_app_country] => US [patent_app_date] => 1997-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 17 [patent_no_of_words] => 3331 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/249/06249025.pdf [firstpage_image] =>[orig_patent_app_number] => 998257 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4056548 [patent_doc_number] => 05969424 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-19 [patent_title] => 'Semiconductor device with pad structure' [patent_app_type] => 1 [patent_app_number] => 8/999115 [patent_app_country] => US [patent_app_date] => 1997-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 28 [patent_no_of_words] => 9182 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/969/05969424.pdf [firstpage_image] =>[orig_patent_app_number] => 999115 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4255082 [patent_doc_number] => 06222269 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-24 [patent_title] => 'Semiconductor device and fabrication process thereof' [patent_app_type] => 1 [patent_app_number] => 8/996105 [patent_app_country] => US [patent_app_date] => 1997-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 23 [patent_no_of_words] => 6621 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/222/06222269.pdf [firstpage_image] =>[orig_patent_app_number] => 996105 [rel_patent_id] =>[rel_patent_doc_number] =>)