
Roy Karl Potter
Examiner (ID: 13991, Phone: (571)272-1842 , Office: P/2822 )
| Most Active Art Unit | 2822 |
| Art Unit(s) | 2822, 2508, 2811, 3621 |
| Total Applications | 2584 |
| Issued Applications | 2409 |
| Pending Applications | 46 |
| Abandoned Applications | 141 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 4148078
[patent_doc_number] => 06031278
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-02-29
[patent_title] => 'IC card and manufacturing method thereof'
[patent_app_type] => 1
[patent_app_number] => 8/954732
[patent_app_country] => US
[patent_app_date] => 1997-10-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 30
[patent_no_of_words] => 9523
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 142
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/031/06031278.pdf
[firstpage_image] =>[orig_patent_app_number] => 954732
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/954732 | IC card and manufacturing method thereof | Oct 19, 1997 | Issued |
Array
(
[id] => 3929602
[patent_doc_number] => 05945729
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-08-31
[patent_title] => 'Technique for attaching die to leads'
[patent_app_type] => 1
[patent_app_number] => 8/948290
[patent_app_country] => US
[patent_app_date] => 1997-10-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 8
[patent_no_of_words] => 4503
[patent_no_of_claims] => 41
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 117
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/945/05945729.pdf
[firstpage_image] =>[orig_patent_app_number] => 948290
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/948290 | Technique for attaching die to leads | Oct 9, 1997 | Issued |
Array
(
[id] => 4361436
[patent_doc_number] => 06201304
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-03-13
[patent_title] => 'Flip chip adaptor package for bare die'
[patent_app_type] => 1
[patent_app_number] => 8/948936
[patent_app_country] => US
[patent_app_date] => 1997-10-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 5
[patent_no_of_words] => 2808
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 121
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/201/06201304.pdf
[firstpage_image] =>[orig_patent_app_number] => 948936
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/948936 | Flip chip adaptor package for bare die | Oct 9, 1997 | Issued |
Array
(
[id] => 4412025
[patent_doc_number] => 06172424
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-01-09
[patent_title] => 'Resin sealing type semiconductor device'
[patent_app_type] => 1
[patent_app_number] => 8/947866
[patent_app_country] => US
[patent_app_date] => 1997-10-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 23
[patent_no_of_words] => 3860
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 98
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/172/06172424.pdf
[firstpage_image] =>[orig_patent_app_number] => 947866
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/947866 | Resin sealing type semiconductor device | Oct 8, 1997 | Issued |
Array
(
[id] => 4180235
[patent_doc_number] => 06084305
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-07-04
[patent_title] => 'Shaped etch-front for self-aligned contact'
[patent_app_type] => 1
[patent_app_number] => 8/944463
[patent_app_country] => US
[patent_app_date] => 1997-10-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 3423
[patent_no_of_claims] => 16
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[patent_words_short_claim] => 203
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/084/06084305.pdf
[firstpage_image] =>[orig_patent_app_number] => 944463
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/944463 | Shaped etch-front for self-aligned contact | Oct 5, 1997 | Issued |
Array
(
[id] => 4277379
[patent_doc_number] => 06246114
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-06-12
[patent_title] => 'Semiconductor device and resin film'
[patent_app_type] => 1
[patent_app_number] => 8/944891
[patent_app_country] => US
[patent_app_date] => 1997-10-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 46
[patent_no_of_words] => 16568
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/246/06246114.pdf
[firstpage_image] =>[orig_patent_app_number] => 944891
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/944891 | Semiconductor device and resin film | Oct 5, 1997 | Issued |
Array
(
[id] => 4191008
[patent_doc_number] => 06093963
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-07-25
[patent_title] => 'Dual landing pad structure including dielectric pocket'
[patent_app_type] => 1
[patent_app_number] => 8/943382
[patent_app_country] => US
[patent_app_date] => 1997-10-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 12
[patent_no_of_words] => 5228
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 169
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/093/06093963.pdf
[firstpage_image] =>[orig_patent_app_number] => 943382
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/943382 | Dual landing pad structure including dielectric pocket | Oct 1, 1997 | Issued |
Array
(
[id] => 4145504
[patent_doc_number] => 06060769
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-05-09
[patent_title] => 'Flip-chip on leads devices'
[patent_app_type] => 1
[patent_app_number] => 8/940306
[patent_app_country] => US
[patent_app_date] => 1997-09-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 6
[patent_no_of_words] => 4517
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 209
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/060/06060769.pdf
[firstpage_image] =>[orig_patent_app_number] => 940306
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/940306 | Flip-chip on leads devices | Sep 29, 1997 | Issued |
Array
(
[id] => 4163377
[patent_doc_number] => 06114750
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-09-05
[patent_title] => 'Surface mount TO-220 package and process for the manufacture thereof'
[patent_app_type] => 1
[patent_app_number] => 8/940230
[patent_app_country] => US
[patent_app_date] => 1997-09-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 11
[patent_no_of_words] => 1625
[patent_no_of_claims] => 13
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/114/06114750.pdf
[firstpage_image] =>[orig_patent_app_number] => 940230
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/940230 | Surface mount TO-220 package and process for the manufacture thereof | Sep 29, 1997 | Issued |
Array
(
[id] => 3954186
[patent_doc_number] => 05977621
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-11-02
[patent_title] => 'Power semiconductor module'
[patent_app_type] => 1
[patent_app_number] => 8/935110
[patent_app_country] => US
[patent_app_date] => 1997-09-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 2
[patent_no_of_words] => 1288
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/977/05977621.pdf
[firstpage_image] =>[orig_patent_app_number] => 935110
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/935110 | Power semiconductor module | Sep 28, 1997 | Issued |
Array
(
[id] => 4244394
[patent_doc_number] => 06091139
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-07-18
[patent_title] => 'Semiconductor device'
[patent_app_type] => 1
[patent_app_number] => 8/938998
[patent_app_country] => US
[patent_app_date] => 1997-09-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[pdf_file] => patents/06/091/06091139.pdf
[firstpage_image] =>[orig_patent_app_number] => 938998
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/938998 | Semiconductor device | Sep 25, 1997 | Issued |
Array
(
[id] => 4414314
[patent_doc_number] => 06265765
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-07-24
[patent_title] => 'Fan-out semiconductor chip assembly'
[patent_app_type] => 1
[patent_app_number] => 8/935962
[patent_app_country] => US
[patent_app_date] => 1997-09-23
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/06/265/06265765.pdf
[firstpage_image] =>[orig_patent_app_number] => 935962
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/935962 | Fan-out semiconductor chip assembly | Sep 22, 1997 | Issued |
Array
(
[id] => 4244193
[patent_doc_number] => 06166434
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-12-26
[patent_title] => 'Die clip assembly for semiconductor package'
[patent_app_type] => 1
[patent_app_number] => 8/935583
[patent_app_country] => US
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[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/06/166/06166434.pdf
[firstpage_image] =>[orig_patent_app_number] => 935583
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/935583 | Die clip assembly for semiconductor package | Sep 22, 1997 | Issued |
Array
(
[id] => 3961159
[patent_doc_number] => 05936289
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[patent_kind] => NA
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[patent_title] => 'Semiconductor device'
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[pdf_file] => patents/05/936/05936289.pdf
[firstpage_image] =>[orig_patent_app_number] => 935937
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/935937 | Semiconductor device | Sep 22, 1997 | Issued |
Array
(
[id] => 4090968
[patent_doc_number] => 06025642
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-02-15
[patent_title] => 'Ultra high density integrated circuit packages'
[patent_app_type] => 1
[patent_app_number] => 8/937200
[patent_app_country] => US
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[firstpage_image] =>[orig_patent_app_number] => 937200
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/937200 | Ultra high density integrated circuit packages | Sep 21, 1997 | Issued |
Array
(
[id] => 4049429
[patent_doc_number] => 05912506
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-06-15
[patent_title] => 'Multi-layer metal sandwich with taper and reduced etch bias and method for forming same'
[patent_app_type] => 1
[patent_app_number] => 8/937349
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[pdf_file] => patents/05/912/05912506.pdf
[firstpage_image] =>[orig_patent_app_number] => 937349
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/937349 | Multi-layer metal sandwich with taper and reduced etch bias and method for forming same | Sep 19, 1997 | Issued |
Array
(
[id] => 4067913
[patent_doc_number] => 05895965
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-04-20
[patent_title] => 'Semiconductor device'
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[patent_app_number] => 8/933056
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[pdf_file] => patents/05/895/05895965.pdf
[firstpage_image] =>[orig_patent_app_number] => 933056
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/933056 | Semiconductor device | Sep 17, 1997 | Issued |
Array
(
[id] => 4153786
[patent_doc_number] => 06103548
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[firstpage_image] =>[orig_patent_app_number] => 931982
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/931982 | Semiconductor device and method of manufacture | Sep 16, 1997 | Issued |
Array
(
[id] => 4253104
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[patent_issue_date] => 2000-10-24
[patent_title] => 'CMOS semiconductor device comprising graded N-LDD junctions with increased HCI lifetime'
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[firstpage_image] =>[orig_patent_app_number] => 924644
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/924644 | CMOS semiconductor device comprising graded N-LDD junctions with increased HCI lifetime | Sep 4, 1997 | Issued |
Array
(
[id] => 4195279
[patent_doc_number] => 06153933
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-11-28
[patent_title] => 'Elimination of residual materials in a multiple-layer interconnect structure'
[patent_app_type] => 1
[patent_app_number] => 8/925821
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[pdf_file] => patents/06/153/06153933.pdf
[firstpage_image] =>[orig_patent_app_number] => 925821
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/925821 | Elimination of residual materials in a multiple-layer interconnect structure | Sep 4, 1997 | Issued |