
Rupal Dharia
Supervisory Patent Examiner (ID: 2589, Phone: (571)272-3880 , Office: P/2400 )
| Most Active Art Unit | 2181 |
| Art Unit(s) | 2181, 2781, 2492, 2305, 2400, 2100, 2456, 2141, 2189, 2443, 2441 |
| Total Applications | 412 |
| Issued Applications | 349 |
| Pending Applications | 25 |
| Abandoned Applications | 39 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 1567351
[patent_doc_number] => 06363445
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-03-26
[patent_title] => 'Method of bus arbitration using requesting device bandwidth and priority ranking'
[patent_app_type] => B1
[patent_app_number] => 09/173573
[patent_app_country] => US
[patent_app_date] => 1998-10-15
[patent_effective_date] => 0000-00-00
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/363/06363445.pdf
[firstpage_image] =>[orig_patent_app_number] => 09173573
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/173573 | Method of bus arbitration using requesting device bandwidth and priority ranking | Oct 14, 1998 | Issued |
Array
(
[id] => 4292019
[patent_doc_number] => 06247084
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-06-12
[patent_title] => 'Integrated circuit with unified memory system and dual bus architecture'
[patent_app_type] => 1
[patent_app_number] => 9/166262
[patent_app_country] => US
[patent_app_date] => 1998-10-05
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[firstpage_image] =>[orig_patent_app_number] => 166262
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/166262 | Integrated circuit with unified memory system and dual bus architecture | Oct 4, 1998 | Issued |
Array
(
[id] => 4374491
[patent_doc_number] => 06170029
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-01-02
[patent_title] => 'Voltage overshoot control in hot plug system'
[patent_app_type] => 1
[patent_app_number] => 9/163922
[patent_app_country] => US
[patent_app_date] => 1998-09-30
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[pdf_file] => patents/06/170/06170029.pdf
[firstpage_image] =>[orig_patent_app_number] => 163922
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/163922 | Voltage overshoot control in hot plug system | Sep 29, 1998 | Issued |
| 09/162975 | METHOD AND APPARATUS FOR MULTIPLE TIER INTELLIGENT BUS ARBITRATION ON A PCI TO PCI BRIDGE | Sep 28, 1998 | Abandoned |
Array
(
[id] => 1572222
[patent_doc_number] => 06378013
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[patent_kind] => B1
[patent_issue_date] => 2002-04-23
[patent_title] => 'System for assessing performance of computer systems'
[patent_app_type] => B1
[patent_app_number] => 09/156370
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/156370 | System for assessing performance of computer systems | Sep 16, 1998 | Issued |
Array
(
[id] => 4422154
[patent_doc_number] => 06272572
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[patent_issue_date] => 2001-08-07
[patent_title] => 'Apparatus and method for transmitting and receiving passenger service system and telephone signals over a network'
[patent_app_type] => 1
[patent_app_number] => 9/154256
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[patent_app_date] => 1998-09-16
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/154256 | Apparatus and method for transmitting and receiving passenger service system and telephone signals over a network | Sep 15, 1998 | Issued |
Array
(
[id] => 1553086
[patent_doc_number] => 06446212
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[patent_issue_date] => 2002-09-03
[patent_title] => 'Processor having an extended operating voltage range'
[patent_app_type] => B1
[patent_app_number] => 09/141899
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/141899 | Processor having an extended operating voltage range | Aug 27, 1998 | Issued |
Array
(
[id] => 4268754
[patent_doc_number] => 06138187
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[patent_title] => 'Method and system for increasing spatial reuse in a serial storage architecture subsystem'
[patent_app_type] => 1
[patent_app_number] => 9/137884
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[firstpage_image] =>[orig_patent_app_number] => 137884
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/137884 | Method and system for increasing spatial reuse in a serial storage architecture subsystem | Aug 20, 1998 | Issued |
Array
(
[id] => 4109824
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[patent_issue_date] => 2000-10-17
[patent_title] => 'Method and system for taking advantage of a pre-stage of data between a host processor and a memory system'
[patent_app_type] => 1
[patent_app_number] => 9/137670
[patent_app_country] => US
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[firstpage_image] =>[orig_patent_app_number] => 137670
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Array
(
[id] => 6908549
[patent_doc_number] => 20010011316
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[patent_issue_date] => 2001-08-02
[patent_title] => 'DISK STORAGE APPARATUS AND SYSTEM UTILIZING RECORDING MEDIUMS OF DIFFERENT TYPES'
[patent_app_type] => new
[patent_app_number] => 09/135465
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/135465 | DISK STORAGE APPARATUS AND SYSTEM UTILIZING RECORDING MEDIUMS OF DIFFERENT TYPES | Aug 16, 1998 | Abandoned |
Array
(
[id] => 4374429
[patent_doc_number] => 06170025
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[patent_issue_date] => 2001-01-02
[patent_title] => 'Distributed computer system supporting remote interrupts and lock mechanism'
[patent_app_type] => 1
[patent_app_number] => 9/132324
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[patent_app_date] => 1998-08-11
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[firstpage_image] =>[orig_patent_app_number] => 132324
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/132324 | Distributed computer system supporting remote interrupts and lock mechanism | Aug 10, 1998 | Issued |
Array
(
[id] => 4366050
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[patent_issue_date] => 2001-09-04
[patent_title] => 'System and method for synchronizing data communication between asynchronous buses'
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[patent_app_number] => 9/131948
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Array
(
[id] => 4316790
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Array
(
[id] => 4373887
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[patent_title] => 'Bridge module'
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Array
(
[id] => 4366615
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[patent_title] => 'Method and apparatus for reducing heat generation in a portable computer'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/107648 | Method and apparatus for reducing heat generation in a portable computer | Jun 29, 1998 | Issued |
Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/105396 | Magnetic disk apparatus | Jun 25, 1998 | Issued |
Array
(
[id] => 4290818
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[firstpage_image] =>[orig_patent_app_number] => 083281
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/083281 | Method and apparatus for power mode transition in a multi-thread processor | May 21, 1998 | Issued |
Array
(
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Array
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Array
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