Search

Rupal Dharia

Supervisory Patent Examiner (ID: 14113, Phone: (571)272-3880 , Office: P/2400 )

Most Active Art Unit
2181
Art Unit(s)
2400, 2492, 2189, 2443, 2781, 2181, 2305, 2456, 2100, 2441, 2141
Total Applications
417
Issued Applications
349
Pending Applications
30
Abandoned Applications
39

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4202658 [patent_doc_number] => 06094725 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-25 [patent_title] => 'Magnetic disk apparatus' [patent_app_type] => 1 [patent_app_number] => 9/105396 [patent_app_country] => US [patent_app_date] => 1998-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 62 [patent_figures_cnt] => 56 [patent_no_of_words] => 27976 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/094/06094725.pdf [firstpage_image] =>[orig_patent_app_number] => 105396 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/105396
Magnetic disk apparatus Jun 25, 1998 Issued
Array ( [id] => 4290818 [patent_doc_number] => 06308279 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-23 [patent_title] => 'Method and apparatus for power mode transition in a multi-thread processor' [patent_app_type] => 1 [patent_app_number] => 9/083281 [patent_app_country] => US [patent_app_date] => 1998-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2437 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/308/06308279.pdf [firstpage_image] =>[orig_patent_app_number] => 083281 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/083281
Method and apparatus for power mode transition in a multi-thread processor May 21, 1998 Issued
Array ( [id] => 4260611 [patent_doc_number] => 06092205 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-18 [patent_title] => 'Device for automatically locking a power button in a computer' [patent_app_type] => 1 [patent_app_number] => 9/079444 [patent_app_country] => US [patent_app_date] => 1998-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2852 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/092/06092205.pdf [firstpage_image] =>[orig_patent_app_number] => 079444 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/079444
Device for automatically locking a power button in a computer May 14, 1998 Issued
Array ( [id] => 4392391 [patent_doc_number] => 06289467 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-11 [patent_title] => 'Installation of processor and power supply modules in a multiprocessor system' [patent_app_type] => 1 [patent_app_number] => 9/075026 [patent_app_country] => US [patent_app_date] => 1998-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3296 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/289/06289467.pdf [firstpage_image] =>[orig_patent_app_number] => 075026 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/075026
Installation of processor and power supply modules in a multiprocessor system May 7, 1998 Issued
Array ( [id] => 4298281 [patent_doc_number] => 06282593 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-28 [patent_title] => 'Extension of electronic buses and their bus protocols using signal-propagation timing compensation' [patent_app_type] => 1 [patent_app_number] => 9/075450 [patent_app_country] => US [patent_app_date] => 1998-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 5600 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/282/06282593.pdf [firstpage_image] =>[orig_patent_app_number] => 075450 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/075450
Extension of electronic buses and their bus protocols using signal-propagation timing compensation May 7, 1998 Issued
Array ( [id] => 4176510 [patent_doc_number] => 06157976 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-05 [patent_title] => 'PCI-PCI bridge and PCI-bus audio accelerator integrated circuit' [patent_app_type] => 1 [patent_app_number] => 9/074657 [patent_app_country] => US [patent_app_date] => 1998-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2294 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 353 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/157/06157976.pdf [firstpage_image] =>[orig_patent_app_number] => 074657 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/074657
PCI-PCI bridge and PCI-bus audio accelerator integrated circuit May 5, 1998 Issued
Array ( [id] => 4381814 [patent_doc_number] => 06256743 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-03 [patent_title] => 'Selective power-down for high performance CPU/system' [patent_app_type] => 1 [patent_app_number] => 9/069335 [patent_app_country] => US [patent_app_date] => 1998-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 6410 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/256/06256743.pdf [firstpage_image] =>[orig_patent_app_number] => 069335 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/069335
Selective power-down for high performance CPU/system Apr 28, 1998 Issued
Array ( [id] => 4021593 [patent_doc_number] => 05987546 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-16 [patent_title] => 'Multiple long bus architecture having a non-terminal termination arrangement' [patent_app_type] => 1 [patent_app_number] => 9/063707 [patent_app_country] => US [patent_app_date] => 1998-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3496 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/987/05987546.pdf [firstpage_image] =>[orig_patent_app_number] => 063707 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/063707
Multiple long bus architecture having a non-terminal termination arrangement Apr 20, 1998 Issued
Array ( [id] => 4335634 [patent_doc_number] => 06243819 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-05 [patent_title] => 'Lid switch in portable computers and the power management system using the same' [patent_app_type] => 1 [patent_app_number] => 9/058855 [patent_app_country] => US [patent_app_date] => 1998-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4748 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/243/06243819.pdf [firstpage_image] =>[orig_patent_app_number] => 058855 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/058855
Lid switch in portable computers and the power management system using the same Apr 12, 1998 Issued
Array ( [id] => 4398989 [patent_doc_number] => 06295568 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-25 [patent_title] => 'Method and system for supporting multiple local buses operating at different frequencies' [patent_app_type] => 1 [patent_app_number] => 9/055414 [patent_app_country] => US [patent_app_date] => 1998-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4726 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/295/06295568.pdf [firstpage_image] =>[orig_patent_app_number] => 055414 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/055414
Method and system for supporting multiple local buses operating at different frequencies Apr 5, 1998 Issued
Array ( [id] => 4318237 [patent_doc_number] => 06185688 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-06 [patent_title] => 'Method for controlling security of a computer removably coupled in a network' [patent_app_type] => 1 [patent_app_number] => 9/044511 [patent_app_country] => US [patent_app_date] => 1998-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 1190 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/185/06185688.pdf [firstpage_image] =>[orig_patent_app_number] => 044511 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/044511
Method for controlling security of a computer removably coupled in a network Mar 17, 1998 Issued
Array ( [id] => 4380991 [patent_doc_number] => 06256692 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-03 [patent_title] => 'CardBus interface circuit, and a CardBus PC having the same' [patent_app_type] => 1 [patent_app_number] => 9/031349 [patent_app_country] => US [patent_app_date] => 1998-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 9720 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/256/06256692.pdf [firstpage_image] =>[orig_patent_app_number] => 031349 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/031349
CardBus interface circuit, and a CardBus PC having the same Feb 26, 1998 Issued
Array ( [id] => 3986147 [patent_doc_number] => 05919262 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-06 [patent_title] => 'Variable-voltage CPU voltage regulator' [patent_app_type] => 1 [patent_app_number] => 9/017049 [patent_app_country] => US [patent_app_date] => 1998-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 1213 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/919/05919262.pdf [firstpage_image] =>[orig_patent_app_number] => 017049 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/017049
Variable-voltage CPU voltage regulator Feb 1, 1998 Issued
Array ( [id] => 1431119 [patent_doc_number] => 06523080 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-02-18 [patent_title] => 'Shared bus non-sequential data ordering method and apparatus' [patent_app_type] => B1 [patent_app_number] => 09/014090 [patent_app_country] => US [patent_app_date] => 1998-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 2593 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/523/06523080.pdf [firstpage_image] =>[orig_patent_app_number] => 09014090 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/014090
Shared bus non-sequential data ordering method and apparatus Jan 26, 1998 Issued
Array ( [id] => 4104245 [patent_doc_number] => 06026502 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-15 [patent_title] => 'Method and mechanism for preventing from invading of computer virus and/or hacker' [patent_app_type] => 1 [patent_app_number] => 9/017057 [patent_app_country] => US [patent_app_date] => 1998-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3246 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/026/06026502.pdf [firstpage_image] =>[orig_patent_app_number] => 017057 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/017057
Method and mechanism for preventing from invading of computer virus and/or hacker Jan 26, 1998 Issued
Array ( [id] => 4109811 [patent_doc_number] => 06134622 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-17 [patent_title] => 'Dual mode bus bridge for computer system' [patent_app_type] => 1 [patent_app_number] => 9/013777 [patent_app_country] => US [patent_app_date] => 1998-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 7607 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/134/06134622.pdf [firstpage_image] =>[orig_patent_app_number] => 013777 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/013777
Dual mode bus bridge for computer system Jan 25, 1998 Issued
Array ( [id] => 4211951 [patent_doc_number] => 06044473 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-28 [patent_title] => 'Portable computer having a switch for changing a power-controlling mode' [patent_app_type] => 1 [patent_app_number] => 9/009654 [patent_app_country] => US [patent_app_date] => 1998-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 2100 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/044/06044473.pdf [firstpage_image] =>[orig_patent_app_number] => 009654 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/009654
Portable computer having a switch for changing a power-controlling mode Jan 19, 1998 Issued
Array ( [id] => 4115901 [patent_doc_number] => 06067588 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-23 [patent_title] => 'Channel interface signal tracing input/output controller apparatus' [patent_app_type] => 1 [patent_app_number] => 9/007777 [patent_app_country] => US [patent_app_date] => 1998-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 11879 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 264 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/067/06067588.pdf [firstpage_image] =>[orig_patent_app_number] => 007777 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/007777
Channel interface signal tracing input/output controller apparatus Jan 15, 1998 Issued
Array ( [id] => 4199748 [patent_doc_number] => 06038688 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-14 [patent_title] => 'Node disjoint path forming method for hypercube having damaged node' [patent_app_type] => 1 [patent_app_number] => 9/007815 [patent_app_country] => US [patent_app_date] => 1998-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 2252 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 293 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/038/06038688.pdf [firstpage_image] =>[orig_patent_app_number] => 007815 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/007815
Node disjoint path forming method for hypercube having damaged node Jan 14, 1998 Issued
Array ( [id] => 4299387 [patent_doc_number] => 06282664 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-28 [patent_title] => 'Method and apparatus for switching an electronic system between an operating mode and stand-by mode' [patent_app_type] => 1 [patent_app_number] => 9/007298 [patent_app_country] => US [patent_app_date] => 1998-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 2793 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 239 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/282/06282664.pdf [firstpage_image] =>[orig_patent_app_number] => 007298 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/007298
Method and apparatus for switching an electronic system between an operating mode and stand-by mode Jan 13, 1998 Issued
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