Search

Rupal Dharia

Supervisory Patent Examiner (ID: 12531, Phone: (571)272-3880 , Office: P/2400 )

Most Active Art Unit
2181
Art Unit(s)
2181, 2400, 2100, 2456, 2443, 2141, 2441, 2781, 2189, 2305, 2492
Total Applications
411
Issued Applications
349
Pending Applications
24
Abandoned Applications
39

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1361747 [patent_doc_number] => 06587952 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-07-01 [patent_title] => 'Selective power-down for high performance CPU/system' [patent_app_type] => B2 [patent_app_number] => 10/176544 [patent_app_country] => US [patent_app_date] => 2002-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 6583 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/587/06587952.pdf [firstpage_image] =>[orig_patent_app_number] => 10176544 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/176544
Selective power-down for high performance CPU/system Jun 23, 2002 Issued
Array ( [id] => 908324 [patent_doc_number] => 07337255 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-02-26 [patent_title] => 'Distributed data handling and processing resources system' [patent_app_type] => utility [patent_app_number] => 10/167852 [patent_app_country] => US [patent_app_date] => 2002-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 2766 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/337/07337255.pdf [firstpage_image] =>[orig_patent_app_number] => 10167852 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/167852
Distributed data handling and processing resources system Jun 11, 2002 Issued
Array ( [id] => 5848296 [patent_doc_number] => 20020133653 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-09-19 [patent_title] => 'Centralized queue in network printing systems' [patent_app_type] => new [patent_app_number] => 10/150085 [patent_app_country] => US [patent_app_date] => 2002-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5683 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0133/20020133653.pdf [firstpage_image] =>[orig_patent_app_number] => 10150085 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/150085
Centralized queue in network printing systems May 19, 2002 Issued
Array ( [id] => 1353666 [patent_doc_number] => 06594769 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-07-15 [patent_title] => 'Reference voltage distribution for multiload I/O systems' [patent_app_type] => B2 [patent_app_number] => 10/136011 [patent_app_country] => US [patent_app_date] => 2002-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6160 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/594/06594769.pdf [firstpage_image] =>[orig_patent_app_number] => 10136011 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/136011
Reference voltage distribution for multiload I/O systems Apr 28, 2002 Issued
Array ( [id] => 5990636 [patent_doc_number] => 20020099897 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-07-25 [patent_title] => 'Automatic conversion device driver of device type data' [patent_app_type] => new [patent_app_number] => 10/056616 [patent_app_country] => US [patent_app_date] => 2002-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1911 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0099/20020099897.pdf [firstpage_image] =>[orig_patent_app_number] => 10056616 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/056616
Automatic conversion device driver of device type data Jan 23, 2002 Issued
Array ( [id] => 1416741 [patent_doc_number] => 06532508 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-03-11 [patent_title] => 'Control system for controlling safety-critical processes' [patent_app_type] => B2 [patent_app_number] => 10/029894 [patent_app_country] => US [patent_app_date] => 2001-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 5533 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/532/06532508.pdf [firstpage_image] =>[orig_patent_app_number] => 10029894 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/029894
Control system for controlling safety-critical processes Dec 20, 2001 Issued
Array ( [id] => 1347575 [patent_doc_number] => 06598104 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-07-22 [patent_title] => 'Smart retry system that reduces wasted bus transactions associated with master retries' [patent_app_type] => B1 [patent_app_number] => 10/016930 [patent_app_country] => US [patent_app_date] => 2001-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 8 [patent_no_of_words] => 5405 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/598/06598104.pdf [firstpage_image] =>[orig_patent_app_number] => 10016930 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/016930
Smart retry system that reduces wasted bus transactions associated with master retries Dec 12, 2001 Issued
Array ( [id] => 1291721 [patent_doc_number] => 06643723 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-11-04 [patent_title] => 'Method and apparatus for releasing bus control by a device connected to the bus' [patent_app_type] => B1 [patent_app_number] => 09/913683 [patent_app_country] => US [patent_app_date] => 2001-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2106 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 289 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/643/06643723.pdf [firstpage_image] =>[orig_patent_app_number] => 09913683 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/913683
Method and apparatus for releasing bus control by a device connected to the bus Nov 19, 2001 Issued
Array ( [id] => 6369285 [patent_doc_number] => 20020059493 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-05-16 [patent_title] => 'Compact ISA-bus interface' [patent_app_type] => new [patent_app_number] => 09/993964 [patent_app_country] => US [patent_app_date] => 2001-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7399 [patent_no_of_claims] => 97 [patent_no_of_ind_claims] => 13 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0059/20020059493.pdf [firstpage_image] =>[orig_patent_app_number] => 09993964 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/993964
Compact ISA-bus interface Nov 13, 2001 Abandoned
Array ( [id] => 1539336 [patent_doc_number] => 06412074 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-25 [patent_title] => 'Computer power down upon emergency network notification' [patent_app_type] => B1 [patent_app_number] => 09/943862 [patent_app_country] => US [patent_app_date] => 2001-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3492 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 20 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/412/06412074.pdf [firstpage_image] =>[orig_patent_app_number] => 09943862 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/943862
Computer power down upon emergency network notification Aug 30, 2001 Issued
Array ( [id] => 6226851 [patent_doc_number] => 20020004914 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-01-10 [patent_title] => 'Input/output device for connection and disconnection of active lines' [patent_app_type] => new [patent_app_number] => 09/932973 [patent_app_country] => US [patent_app_date] => 2001-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9019 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0004/20020004914.pdf [firstpage_image] =>[orig_patent_app_number] => 09932973 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/932973
Input/output device for connection and disconnection of active lines Aug 20, 2001 Issued
Array ( [id] => 6606342 [patent_doc_number] => 20020042844 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-04-11 [patent_title] => 'Synchronized sampling on a multiprocessor backplane via a broadcast timestamp' [patent_app_type] => new [patent_app_number] => 09/920423 [patent_app_country] => US [patent_app_date] => 2001-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4338 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0042/20020042844.pdf [firstpage_image] =>[orig_patent_app_number] => 09920423 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/920423
Synchronized sampling on a multiprocessor backplane via a broadcast timestamp Jul 31, 2001 Abandoned
Array ( [id] => 6143484 [patent_doc_number] => 20020002646 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-01-03 [patent_title] => 'Method and apparatus for efficient bus arbitration' [patent_app_type] => new [patent_app_number] => 09/904632 [patent_app_country] => US [patent_app_date] => 2001-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4086 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0002/20020002646.pdf [firstpage_image] =>[orig_patent_app_number] => 09904632 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/904632
Method and apparatus for efficient bus arbitration Jul 12, 2001 Issued
90/006024 COMPUTER INCLUDING AN INTEGRATED CIRCUIT HAVING AN ON-CHIP HIGH VOLTAGE SOURCE May 28, 2001 Issued
Array ( [id] => 5890378 [patent_doc_number] => 20020013912 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-01-31 [patent_title] => 'Selective power-down for high performance CPU/system' [patent_app_type] => new [patent_app_number] => 09/852294 [patent_app_country] => US [patent_app_date] => 2001-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6647 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0013/20020013912.pdf [firstpage_image] =>[orig_patent_app_number] => 09852294 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/852294
Selective power-down for high performance CPU/system May 9, 2001 Issued
Array ( [id] => 1601958 [patent_doc_number] => 06385685 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-07 [patent_title] => 'Memory card utilizing two wire bus' [patent_app_type] => B1 [patent_app_number] => 09/833871 [patent_app_country] => US [patent_app_date] => 2001-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2138 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/385/06385685.pdf [firstpage_image] =>[orig_patent_app_number] => 09833871 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/833871
Memory card utilizing two wire bus Apr 11, 2001 Issued
Array ( [id] => 6894526 [patent_doc_number] => 20010016892 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-08-23 [patent_title] => 'Computer system for processing system management interrupt requests' [patent_app_type] => new [patent_app_number] => 09/825657 [patent_app_country] => US [patent_app_date] => 2001-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4636 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0016/20010016892.pdf [firstpage_image] =>[orig_patent_app_number] => 09825657 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/825657
Computer system for processing system management interrupt requests Apr 2, 2001 Issued
Array ( [id] => 1524966 [patent_doc_number] => 06415389 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-07-02 [patent_title] => 'Jumperless computer system' [patent_app_type] => B2 [patent_app_number] => 09/795141 [patent_app_country] => US [patent_app_date] => 2001-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3583 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/415/06415389.pdf [firstpage_image] =>[orig_patent_app_number] => 09795141 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/795141
Jumperless computer system Feb 28, 2001 Issued
Array ( [id] => 6896715 [patent_doc_number] => 20010027505 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-10-04 [patent_title] => 'Method and apparatus for multiple tier intelligent bus arbitration on a PCI to PCI bridge' [patent_app_type] => new [patent_app_number] => 09/796016 [patent_app_country] => US [patent_app_date] => 2001-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3684 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0027/20010027505.pdf [firstpage_image] =>[orig_patent_app_number] => 09796016 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/796016
Method and apparatus for multiple tier intelligent bus arbitration on a PCI to PCI bridge Feb 27, 2001 Issued
Array ( [id] => 1475080 [patent_doc_number] => 06408394 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-18 [patent_title] => 'System and method for applying initialization power to SCSI devices' [patent_app_type] => B1 [patent_app_number] => 09/790446 [patent_app_country] => US [patent_app_date] => 2001-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 6284 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/408/06408394.pdf [firstpage_image] =>[orig_patent_app_number] => 09790446 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/790446
System and method for applying initialization power to SCSI devices Feb 20, 2001 Issued
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