Search

Rupal Dharia

Supervisory Patent Examiner (ID: 2589, Phone: (571)272-3880 , Office: P/2400 )

Most Active Art Unit
2181
Art Unit(s)
2181, 2781, 2492, 2305, 2400, 2100, 2456, 2141, 2189, 2443, 2441
Total Applications
412
Issued Applications
349
Pending Applications
25
Abandoned Applications
39

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1521648 [patent_doc_number] => 06502148 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-12-31 [patent_title] => 'System for scaling an application server system' [patent_app_type] => B1 [patent_app_number] => 09/480318 [patent_app_country] => US [patent_app_date] => 2000-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 7987 [patent_no_of_claims] => 52 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/502/06502148.pdf [firstpage_image] =>[orig_patent_app_number] => 09480318 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/480318
System for scaling an application server system Jan 9, 2000 Issued
Array ( [id] => 1423353 [patent_doc_number] => 06539445 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-03-25 [patent_title] => 'Method for load balancing in an application server system' [patent_app_type] => B1 [patent_app_number] => 09/481101 [patent_app_country] => US [patent_app_date] => 2000-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 15 [patent_no_of_words] => 7958 [patent_no_of_claims] => 51 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/539/06539445.pdf [firstpage_image] =>[orig_patent_app_number] => 09481101 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/481101
Method for load balancing in an application server system Jan 9, 2000 Issued
Array ( [id] => 1376697 [patent_doc_number] => 06578099 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-06-10 [patent_title] => 'Method and computer system for safely hot-plugging adapter cards' [patent_app_type] => B1 [patent_app_number] => 09/477756 [patent_app_country] => US [patent_app_date] => 2000-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4685 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/578/06578099.pdf [firstpage_image] =>[orig_patent_app_number] => 09477756 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/477756
Method and computer system for safely hot-plugging adapter cards Jan 3, 2000 Issued
Array ( [id] => 1376651 [patent_doc_number] => 06578096 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-06-10 [patent_title] => 'Method and system for efficient I/O operation completion in a fibre channel node' [patent_app_type] => B1 [patent_app_number] => 09/475907 [patent_app_country] => US [patent_app_date] => 1999-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 18 [patent_no_of_words] => 9687 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/578/06578096.pdf [firstpage_image] =>[orig_patent_app_number] => 09475907 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/475907
Method and system for efficient I/O operation completion in a fibre channel node Dec 29, 1999 Issued
Array ( [id] => 1485123 [patent_doc_number] => 06453422 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-17 [patent_title] => 'Reference voltage distribution for multiload i/o systems' [patent_app_type] => B1 [patent_app_number] => 09/470686 [patent_app_country] => US [patent_app_date] => 1999-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6162 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/453/06453422.pdf [firstpage_image] =>[orig_patent_app_number] => 09470686 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/470686
Reference voltage distribution for multiload i/o systems Dec 22, 1999 Issued
09/424099 ADDRESSING SCHEME FOR DOUBLING THE TRANSMISSION CAPACITY OF A MASTER-CONTROLLED SLAVE-TO-SLAVE COMMUNICATION IN ANY KIND OF BUS SYSTEM Nov 17, 1999 Abandoned
Array ( [id] => 4426893 [patent_doc_number] => 06195724 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-27 [patent_title] => 'Methods and apparatus for prioritization of access to external devices' [patent_app_type] => 1 [patent_app_number] => 9/439860 [patent_app_country] => US [patent_app_date] => 1999-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 37 [patent_no_of_words] => 15539 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/195/06195724.pdf [firstpage_image] =>[orig_patent_app_number] => 439860 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/439860
Methods and apparatus for prioritization of access to external devices Nov 11, 1999 Issued
Array ( [id] => 1567224 [patent_doc_number] => 06438632 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-20 [patent_title] => 'Electronic bulletin board system' [patent_app_type] => B1 [patent_app_number] => 09/423599 [patent_app_country] => US [patent_app_date] => 1999-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 5443 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/438/06438632.pdf [firstpage_image] =>[orig_patent_app_number] => 09423599 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/423599
Electronic bulletin board system Nov 8, 1999 Issued
Array ( [id] => 1444059 [patent_doc_number] => 06496896 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-12-17 [patent_title] => 'Transmission apparatus, recording apparatus, transmission and reception apparatus, transmission method, recording method and transmission and reception method' [patent_app_type] => B1 [patent_app_number] => 09/435639 [patent_app_country] => US [patent_app_date] => 1999-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 60 [patent_figures_cnt] => 114 [patent_no_of_words] => 42543 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/496/06496896.pdf [firstpage_image] =>[orig_patent_app_number] => 09435639 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/435639
Transmission apparatus, recording apparatus, transmission and reception apparatus, transmission method, recording method and transmission and reception method Nov 7, 1999 Issued
Array ( [id] => 1361010 [patent_doc_number] => 06587904 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-07-01 [patent_title] => 'Method and apparatus for preventing loops in a full-duplex bus' [patent_app_type] => B1 [patent_app_number] => 09/435160 [patent_app_country] => US [patent_app_date] => 1999-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 24 [patent_no_of_words] => 5909 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/587/06587904.pdf [firstpage_image] =>[orig_patent_app_number] => 09435160 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/435160
Method and apparatus for preventing loops in a full-duplex bus Nov 4, 1999 Issued
Array ( [id] => 7630025 [patent_doc_number] => 06636914 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-10-21 [patent_title] => 'Method and apparatus for arbitration and fairness on a full-duplex bus using dual phases' [patent_app_type] => B1 [patent_app_number] => 09/435134 [patent_app_country] => US [patent_app_date] => 1999-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 5424 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 25 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/636/06636914.pdf [firstpage_image] =>[orig_patent_app_number] => 09435134 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/435134
Method and apparatus for arbitration and fairness on a full-duplex bus using dual phases Nov 4, 1999 Issued
Array ( [id] => 4280438 [patent_doc_number] => 06260091 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-10 [patent_title] => 'Method and apparatus for performing out-of-order bus operations in which an agent only arbitrates for use of a data bus to send data with a deferred reply' [patent_app_type] => 1 [patent_app_number] => 9/434080 [patent_app_country] => US [patent_app_date] => 1999-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 11198 [patent_no_of_claims] => 47 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/260/06260091.pdf [firstpage_image] =>[orig_patent_app_number] => 434080 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/434080
Method and apparatus for performing out-of-order bus operations in which an agent only arbitrates for use of a data bus to send data with a deferred reply Nov 4, 1999 Issued
Array ( [id] => 1376682 [patent_doc_number] => 06578098 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-06-10 [patent_title] => 'Predictive mechanism for ASB slave responses' [patent_app_type] => B1 [patent_app_number] => 09/435133 [patent_app_country] => US [patent_app_date] => 1999-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6296 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/578/06578098.pdf [firstpage_image] =>[orig_patent_app_number] => 09435133 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/435133
Predictive mechanism for ASB slave responses Nov 3, 1999 Issued
Array ( [id] => 1549524 [patent_doc_number] => 06374321 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-16 [patent_title] => 'Mechanisms for converting address and data signals to interrupt message signals' [patent_app_type] => B1 [patent_app_number] => 09/428682 [patent_app_country] => US [patent_app_date] => 1999-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5940 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/374/06374321.pdf [firstpage_image] =>[orig_patent_app_number] => 09428682 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/428682
Mechanisms for converting address and data signals to interrupt message signals Oct 26, 1999 Issued
Array ( [id] => 1431863 [patent_doc_number] => 06516378 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-02-04 [patent_title] => 'Microprocessor for controlling busses' [patent_app_type] => B1 [patent_app_number] => 09/426757 [patent_app_country] => US [patent_app_date] => 1999-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 26 [patent_no_of_words] => 10841 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/516/06516378.pdf [firstpage_image] =>[orig_patent_app_number] => 09426757 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/426757
Microprocessor for controlling busses Oct 25, 1999 Issued
Array ( [id] => 4334922 [patent_doc_number] => 06243777 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-05 [patent_title] => 'Circuit for preventing bus contention' [patent_app_type] => 1 [patent_app_number] => 9/426634 [patent_app_country] => US [patent_app_date] => 1999-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 14 [patent_no_of_words] => 4246 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/243/06243777.pdf [firstpage_image] =>[orig_patent_app_number] => 426634 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/426634
Circuit for preventing bus contention Oct 25, 1999 Issued
Array ( [id] => 1400736 [patent_doc_number] => 06564278 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-05-13 [patent_title] => 'System and method for obtaining board address information' [patent_app_type] => B1 [patent_app_number] => 09/425848 [patent_app_country] => US [patent_app_date] => 1999-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 1897 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/564/06564278.pdf [firstpage_image] =>[orig_patent_app_number] => 09425848 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/425848
System and method for obtaining board address information Oct 20, 1999 Issued
Array ( [id] => 1444053 [patent_doc_number] => 06496894 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-12-17 [patent_title] => 'Method for enforcing device connection policies' [patent_app_type] => B1 [patent_app_number] => 09/421447 [patent_app_country] => US [patent_app_date] => 1999-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2018 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/496/06496894.pdf [firstpage_image] =>[orig_patent_app_number] => 09421447 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/421447
Method for enforcing device connection policies Oct 18, 1999 Issued
Array ( [id] => 1480918 [patent_doc_number] => 06389492 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-14 [patent_title] => 'Apparatus for flexibly allocating request/grant pins between multiple bus controllers' [patent_app_type] => B1 [patent_app_number] => 09/418465 [patent_app_country] => US [patent_app_date] => 1999-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3406 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 252 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/389/06389492.pdf [firstpage_image] =>[orig_patent_app_number] => 09418465 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/418465
Apparatus for flexibly allocating request/grant pins between multiple bus controllers Oct 14, 1999 Issued
Array ( [id] => 1601947 [patent_doc_number] => 06385680 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-07 [patent_title] => 'Method for flexibly allocating request/grant pins between multiple bus controllers' [patent_app_type] => B1 [patent_app_number] => 09/418468 [patent_app_country] => US [patent_app_date] => 1999-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3440 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/385/06385680.pdf [firstpage_image] =>[orig_patent_app_number] => 09418468 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/418468
Method for flexibly allocating request/grant pins between multiple bus controllers Oct 14, 1999 Issued
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