Search

Rupal Dharia

Supervisory Patent Examiner (ID: 12531, Phone: (571)272-3880 , Office: P/2400 )

Most Active Art Unit
2181
Art Unit(s)
2181, 2400, 2100, 2456, 2443, 2141, 2441, 2781, 2189, 2305, 2492
Total Applications
411
Issued Applications
349
Pending Applications
24
Abandoned Applications
39

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1432372 [patent_doc_number] => 06505264 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-01-07 [patent_title] => 'Information transmitting apparatus and method, information receiving apparatus and method, and information transmitting/receiving apparatus and method' [patent_app_type] => B1 [patent_app_number] => 09/418324 [patent_app_country] => US [patent_app_date] => 1999-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 18 [patent_no_of_words] => 13895 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/505/06505264.pdf [firstpage_image] =>[orig_patent_app_number] => 09418324 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/418324
Information transmitting apparatus and method, information receiving apparatus and method, and information transmitting/receiving apparatus and method Oct 13, 1999 Issued
Array ( [id] => 4305053 [patent_doc_number] => 06269448 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-31 [patent_title] => 'Portable electronic device having a travel mode for use when demonstrating operability of the device to security personnel' [patent_app_type] => 1 [patent_app_number] => 9/416515 [patent_app_country] => US [patent_app_date] => 1999-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 1576 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/269/06269448.pdf [firstpage_image] =>[orig_patent_app_number] => 416515 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/416515
Portable electronic device having a travel mode for use when demonstrating operability of the device to security personnel Oct 7, 1999 Issued
Array ( [id] => 1521665 [patent_doc_number] => 06502152 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-12-31 [patent_title] => 'Dual interrupt vector mapping' [patent_app_type] => B1 [patent_app_number] => 09/410743 [patent_app_country] => US [patent_app_date] => 1999-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 10775 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/502/06502152.pdf [firstpage_image] =>[orig_patent_app_number] => 09410743 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/410743
Dual interrupt vector mapping Sep 30, 1999 Issued
Array ( [id] => 1513219 [patent_doc_number] => 06442642 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-27 [patent_title] => 'System and method for providing an improved synchronous operation of an advanced peripheral bus with backward compatibility' [patent_app_type] => B1 [patent_app_number] => 09/410167 [patent_app_country] => US [patent_app_date] => 1999-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 6444 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 244 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/442/06442642.pdf [firstpage_image] =>[orig_patent_app_number] => 09410167 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/410167
System and method for providing an improved synchronous operation of an advanced peripheral bus with backward compatibility Sep 29, 1999 Issued
Array ( [id] => 1428825 [patent_doc_number] => 06513083 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-01-28 [patent_title] => 'Hierarchical bus arbitration' [patent_app_type] => B1 [patent_app_number] => 09/407857 [patent_app_country] => US [patent_app_date] => 1999-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5787 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/513/06513083.pdf [firstpage_image] =>[orig_patent_app_number] => 09407857 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/407857
Hierarchical bus arbitration Sep 28, 1999 Issued
Array ( [id] => 1336963 [patent_doc_number] => 06604161 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-08-05 [patent_title] => 'Translation of PCI level interrupts into packet based messages for edge event drive microprocessors' [patent_app_type] => B1 [patent_app_number] => 09/408084 [patent_app_country] => US [patent_app_date] => 1999-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 3845 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/604/06604161.pdf [firstpage_image] =>[orig_patent_app_number] => 09408084 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/408084
Translation of PCI level interrupts into packet based messages for edge event drive microprocessors Sep 28, 1999 Issued
Array ( [id] => 1428817 [patent_doc_number] => 06513082 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-01-28 [patent_title] => 'Adaptive bus arbitration using history buffer' [patent_app_type] => B1 [patent_app_number] => 09/407858 [patent_app_country] => US [patent_app_date] => 1999-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5587 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/513/06513082.pdf [firstpage_image] =>[orig_patent_app_number] => 09407858 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/407858
Adaptive bus arbitration using history buffer Sep 28, 1999 Issued
Array ( [id] => 4423260 [patent_doc_number] => 06311241 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-30 [patent_title] => 'Method and configuration for transferring programs' [patent_app_type] => 1 [patent_app_number] => 9/407256 [patent_app_country] => US [patent_app_date] => 1999-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1823 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/311/06311241.pdf [firstpage_image] =>[orig_patent_app_number] => 407256 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/407256
Method and configuration for transferring programs Sep 26, 1999 Issued
Array ( [id] => 5876963 [patent_doc_number] => 20020049917 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-04-25 [patent_title] => 'METHOD AND SYSTEM FOR CONTROLLING DATA IN A COMPUTER SYSTEM' [patent_app_type] => new [patent_app_number] => 09/399908 [patent_app_country] => US [patent_app_date] => 1999-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3802 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0049/20020049917.pdf [firstpage_image] =>[orig_patent_app_number] => 09399908 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/399908
Method and system for controlling data in a computer system in the event of a power failure Sep 20, 1999 Issued
Array ( [id] => 1524844 [patent_doc_number] => 06415348 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-02 [patent_title] => 'Flexible microcontroller architecture' [patent_app_type] => B1 [patent_app_number] => 09/379457 [patent_app_country] => US [patent_app_date] => 1999-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 17 [patent_no_of_words] => 10166 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/415/06415348.pdf [firstpage_image] =>[orig_patent_app_number] => 09379457 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/379457
Flexible microcontroller architecture Aug 22, 1999 Issued
Array ( [id] => 1557471 [patent_doc_number] => 06401156 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-04 [patent_title] => 'Flexible PC/AT-compatible microcontroller' [patent_app_type] => B1 [patent_app_number] => 09/379456 [patent_app_country] => US [patent_app_date] => 1999-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 19805 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/401/06401156.pdf [firstpage_image] =>[orig_patent_app_number] => 09379456 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/379456
Flexible PC/AT-compatible microcontroller Aug 22, 1999 Issued
Array ( [id] => 1533239 [patent_doc_number] => 06480964 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-11-12 [patent_title] => 'User interface power management control technique for a computer system' [patent_app_type] => B1 [patent_app_number] => 09/377862 [patent_app_country] => US [patent_app_date] => 1999-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2516 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/480/06480964.pdf [firstpage_image] =>[orig_patent_app_number] => 09377862 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/377862
User interface power management control technique for a computer system Aug 19, 1999 Issued
Array ( [id] => 1602196 [patent_doc_number] => 06493781 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-12-10 [patent_title] => 'Servicing of interrupts with stored and restored flags' [patent_app_type] => B1 [patent_app_number] => 09/377358 [patent_app_country] => US [patent_app_date] => 1999-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3369 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/493/06493781.pdf [firstpage_image] =>[orig_patent_app_number] => 09377358 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/377358
Servicing of interrupts with stored and restored flags Aug 18, 1999 Issued
Array ( [id] => 1533104 [patent_doc_number] => 06480923 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-11-12 [patent_title] => 'Information routing for transfer buffers' [patent_app_type] => B1 [patent_app_number] => 09/377635 [patent_app_country] => US [patent_app_date] => 1999-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 9100 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/480/06480923.pdf [firstpage_image] =>[orig_patent_app_number] => 09377635 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/377635
Information routing for transfer buffers Aug 18, 1999 Issued
Array ( [id] => 1533079 [patent_doc_number] => 06480917 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-11-12 [patent_title] => 'Device arbitration including peer-to-peer access arbitration' [patent_app_type] => B1 [patent_app_number] => 09/377638 [patent_app_country] => US [patent_app_date] => 1999-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 9217 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/480/06480917.pdf [firstpage_image] =>[orig_patent_app_number] => 09377638 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/377638
Device arbitration including peer-to-peer access arbitration Aug 18, 1999 Issued
Array ( [id] => 7642400 [patent_doc_number] => 06430646 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-06 [patent_title] => 'Method and apparatus for interfacing a processor with a bus' [patent_app_type] => B1 [patent_app_number] => 09/377004 [patent_app_country] => US [patent_app_date] => 1999-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3507 [patent_no_of_claims] => 44 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 5 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/430/06430646.pdf [firstpage_image] =>[orig_patent_app_number] => 09377004 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/377004
Method and apparatus for interfacing a processor with a bus Aug 17, 1999 Issued
Array ( [id] => 1505930 [patent_doc_number] => 06487621 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-11-26 [patent_title] => 'Architecture, system and method for ensuring an ordered transaction on at least one of a plurality of multi-processor buses that experience a hit-to-modified snoop cycle' [patent_app_type] => B1 [patent_app_number] => 09/375454 [patent_app_country] => US [patent_app_date] => 1999-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5522 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/487/06487621.pdf [firstpage_image] =>[orig_patent_app_number] => 09375454 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/375454
Architecture, system and method for ensuring an ordered transaction on at least one of a plurality of multi-processor buses that experience a hit-to-modified snoop cycle Aug 16, 1999 Issued
Array ( [id] => 1505937 [patent_doc_number] => 06487624 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-11-26 [patent_title] => 'Method and apparatus for hot swapping and bus extension without data corruption' [patent_app_type] => B1 [patent_app_number] => 09/374051 [patent_app_country] => US [patent_app_date] => 1999-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4673 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/487/06487624.pdf [firstpage_image] =>[orig_patent_app_number] => 09374051 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/374051
Method and apparatus for hot swapping and bus extension without data corruption Aug 12, 1999 Issued
Array ( [id] => 1508945 [patent_doc_number] => 06467001 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-10-15 [patent_title] => 'VLSI chip macro interface' [patent_app_type] => B1 [patent_app_number] => 09/374222 [patent_app_country] => US [patent_app_date] => 1999-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 3920 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/467/06467001.pdf [firstpage_image] =>[orig_patent_app_number] => 09374222 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/374222
VLSI chip macro interface Aug 12, 1999 Issued
Array ( [id] => 1456691 [patent_doc_number] => 06457088 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-24 [patent_title] => 'Method and apparatus for programming an amplifier' [patent_app_type] => B1 [patent_app_number] => 09/357486 [patent_app_country] => US [patent_app_date] => 1999-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 9398 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/457/06457088.pdf [firstpage_image] =>[orig_patent_app_number] => 09357486 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/357486
Method and apparatus for programming an amplifier Jul 19, 1999 Issued
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