Search

Rupal Dharia

Supervisory Patent Examiner (ID: 12531, Phone: (571)272-3880 , Office: P/2400 )

Most Active Art Unit
2181
Art Unit(s)
2181, 2400, 2100, 2456, 2443, 2141, 2441, 2781, 2189, 2305, 2492
Total Applications
411
Issued Applications
349
Pending Applications
24
Abandoned Applications
39

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1567377 [patent_doc_number] => 06363451 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-26 [patent_title] => 'Data bus line control circuit' [patent_app_type] => B1 [patent_app_number] => 09/329263 [patent_app_country] => US [patent_app_date] => 1999-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2327 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/363/06363451.pdf [firstpage_image] =>[orig_patent_app_number] => 09329263 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/329263
Data bus line control circuit Jun 27, 1999 Issued
Array ( [id] => 1495209 [patent_doc_number] => 06418491 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-09 [patent_title] => 'Apparatus and method for controlling timing of transfer requests within a data processing apparatus' [patent_app_type] => B1 [patent_app_number] => 09/339954 [patent_app_country] => US [patent_app_date] => 1999-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6335 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/418/06418491.pdf [firstpage_image] =>[orig_patent_app_number] => 09339954 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/339954
Apparatus and method for controlling timing of transfer requests within a data processing apparatus Jun 24, 1999 Issued
Array ( [id] => 1592268 [patent_doc_number] => 06360290 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-19 [patent_title] => 'Commercial standard digital bus interface circuit' [patent_app_type] => B1 [patent_app_number] => 09/338722 [patent_app_country] => US [patent_app_date] => 1999-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 4371 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/360/06360290.pdf [firstpage_image] =>[orig_patent_app_number] => 09338722 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/338722
Commercial standard digital bus interface circuit Jun 22, 1999 Issued
Array ( [id] => 4402708 [patent_doc_number] => 06279115 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-21 [patent_title] => 'Circuit arrangement for monitoring of an electric tripping device for low-voltage switches' [patent_app_type] => 1 [patent_app_number] => 9/254198 [patent_app_country] => US [patent_app_date] => 1999-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 1067 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/279/06279115.pdf [firstpage_image] =>[orig_patent_app_number] => 254198 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/254198
Circuit arrangement for monitoring of an electric tripping device for low-voltage switches Jun 21, 1999 Issued
Array ( [id] => 1549518 [patent_doc_number] => 06374319 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-16 [patent_title] => 'Flag-controlled arbitration of requesting agents' [patent_app_type] => B1 [patent_app_number] => 09/338050 [patent_app_country] => US [patent_app_date] => 1999-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 19 [patent_no_of_words] => 6758 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/374/06374319.pdf [firstpage_image] =>[orig_patent_app_number] => 09338050 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/338050
Flag-controlled arbitration of requesting agents Jun 21, 1999 Issued
Array ( [id] => 4335009 [patent_doc_number] => 06243783 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-05 [patent_title] => 'Application programming interface for managing and automating data transfer operations between applications over a bus structure' [patent_app_type] => 1 [patent_app_number] => 9/337057 [patent_app_country] => US [patent_app_date] => 1999-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 14445 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/243/06243783.pdf [firstpage_image] =>[orig_patent_app_number] => 337057 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/337057
Application programming interface for managing and automating data transfer operations between applications over a bus structure Jun 20, 1999 Issued
Array ( [id] => 1501500 [patent_doc_number] => 06405275 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-11 [patent_title] => 'IEEE1394 common isochronous packet (CIP) enhancements for host controllers' [patent_app_type] => B1 [patent_app_number] => 09/333788 [patent_app_country] => US [patent_app_date] => 1999-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 2817 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/405/06405275.pdf [firstpage_image] =>[orig_patent_app_number] => 09333788 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/333788
IEEE1394 common isochronous packet (CIP) enhancements for host controllers Jun 14, 1999 Issued
Array ( [id] => 1326703 [patent_doc_number] => 06609169 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-08-19 [patent_title] => 'Solid-state audio-video playback system' [patent_app_type] => B1 [patent_app_number] => 09/332541 [patent_app_country] => US [patent_app_date] => 1999-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 25 [patent_no_of_words] => 13568 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 13 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/609/06609169.pdf [firstpage_image] =>[orig_patent_app_number] => 09332541 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/332541
Solid-state audio-video playback system Jun 13, 1999 Issued
09/332242 "BREATHING" STATUS LED INDICATOR Jun 13, 1999 Abandoned
Array ( [id] => 1567355 [patent_doc_number] => 06363446 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-26 [patent_title] => 'Method for selectively encoding bus grant lines to reduce I/O pin requirements' [patent_app_type] => B1 [patent_app_number] => 09/332278 [patent_app_country] => US [patent_app_date] => 1999-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 3890 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/363/06363446.pdf [firstpage_image] =>[orig_patent_app_number] => 09332278 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/332278
Method for selectively encoding bus grant lines to reduce I/O pin requirements Jun 11, 1999 Issued
Array ( [id] => 1567360 [patent_doc_number] => 06363447 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-26 [patent_title] => 'Apparatus for selectively encoding bus grant lines to reduce I/O pin requirements' [patent_app_type] => B1 [patent_app_number] => 09/332279 [patent_app_country] => US [patent_app_date] => 1999-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 3834 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/363/06363447.pdf [firstpage_image] =>[orig_patent_app_number] => 09332279 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/332279
Apparatus for selectively encoding bus grant lines to reduce I/O pin requirements Jun 11, 1999 Issued
Array ( [id] => 1519620 [patent_doc_number] => 06421751 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-16 [patent_title] => 'Detecting a no-tags-free condition in a computer system having multiple outstanding transactions' [patent_app_type] => B1 [patent_app_number] => 09/330637 [patent_app_country] => US [patent_app_date] => 1999-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 44 [patent_no_of_words] => 25204 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 34 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/421/06421751.pdf [firstpage_image] =>[orig_patent_app_number] => 09330637 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/330637
Detecting a no-tags-free condition in a computer system having multiple outstanding transactions Jun 10, 1999 Issued
Array ( [id] => 1480966 [patent_doc_number] => 06389499 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-14 [patent_title] => 'Integrated computer module' [patent_app_type] => B1 [patent_app_number] => 09/328878 [patent_app_country] => US [patent_app_date] => 1999-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 28 [patent_no_of_words] => 10926 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 262 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/389/06389499.pdf [firstpage_image] =>[orig_patent_app_number] => 09328878 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/328878
Integrated computer module Jun 8, 1999 Issued
Array ( [id] => 1584667 [patent_doc_number] => 06449671 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-10 [patent_title] => 'Method and apparatus for busing data elements' [patent_app_type] => B1 [patent_app_number] => 09/328971 [patent_app_country] => US [patent_app_date] => 1999-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 4503 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/449/06449671.pdf [firstpage_image] =>[orig_patent_app_number] => 09328971 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/328971
Method and apparatus for busing data elements Jun 8, 1999 Issued
Array ( [id] => 7642401 [patent_doc_number] => 06430645 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-06 [patent_title] => 'Fibre channel and SCSI address mapping for multiple initiator support' [patent_app_type] => B1 [patent_app_number] => 09/328970 [patent_app_country] => US [patent_app_date] => 1999-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4006 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/430/06430645.pdf [firstpage_image] =>[orig_patent_app_number] => 09328970 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/328970
Fibre channel and SCSI address mapping for multiple initiator support Jun 8, 1999 Issued
Array ( [id] => 1557465 [patent_doc_number] => 06401153 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-06-04 [patent_title] => 'Mechanisms for converting interrupt request signals on address and data lines to interrupt message signals' [patent_app_type] => B2 [patent_app_number] => 09/329001 [patent_app_country] => US [patent_app_date] => 1999-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4503 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/401/06401153.pdf [firstpage_image] =>[orig_patent_app_number] => 09329001 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/329001
Mechanisms for converting interrupt request signals on address and data lines to interrupt message signals Jun 7, 1999 Issued
Array ( [id] => 1557456 [patent_doc_number] => 06401151 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-04 [patent_title] => 'Method for configuring bus architecture through software control' [patent_app_type] => B1 [patent_app_number] => 09/327412 [patent_app_country] => US [patent_app_date] => 1999-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2536 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/401/06401151.pdf [firstpage_image] =>[orig_patent_app_number] => 09327412 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/327412
Method for configuring bus architecture through software control Jun 6, 1999 Issued
Array ( [id] => 1587300 [patent_doc_number] => 06425029 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-23 [patent_title] => 'Apparatus for configuring bus architecture through software control' [patent_app_type] => B1 [patent_app_number] => 09/327413 [patent_app_country] => US [patent_app_date] => 1999-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2623 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/425/06425029.pdf [firstpage_image] =>[orig_patent_app_number] => 09327413 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/327413
Apparatus for configuring bus architecture through software control Jun 6, 1999 Issued
90/005381 AIRCRAFT DISPLAY AND CONTROL SYSTEM WITH VIRTUAL BACKPLANE ARCHITECTURE Jun 2, 1999 Issued
Array ( [id] => 1587288 [patent_doc_number] => 06425025 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-23 [patent_title] => 'System and method for connecting electronic circuitry in a computer system' [patent_app_type] => B1 [patent_app_number] => 09/325688 [patent_app_country] => US [patent_app_date] => 1999-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 17 [patent_no_of_words] => 6404 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/425/06425025.pdf [firstpage_image] =>[orig_patent_app_number] => 09325688 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/325688
System and method for connecting electronic circuitry in a computer system Jun 2, 1999 Issued
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