
Russell G. Fiebig
Examiner (ID: 14740, Phone: (571)270-5366 , Office: P/1655 )
| Most Active Art Unit | 1655 |
| Art Unit(s) | 1655 |
| Total Applications | 1057 |
| Issued Applications | 630 |
| Pending Applications | 106 |
| Abandoned Applications | 368 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 16767279
[patent_doc_number] => 10979071
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-04-13
[patent_title] => Systems and methods for variable length codeword based, hybrid data encoding and decoding using dynamic memory allocation
[patent_app_type] => utility
[patent_app_number] => 16/691496
[patent_app_country] => US
[patent_app_date] => 2019-11-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 19
[patent_no_of_words] => 10617
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 112
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16691496
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/691496 | Systems and methods for variable length codeword based, hybrid data encoding and decoding using dynamic memory allocation | Nov 20, 2019 | Issued |
Array
(
[id] => 16849009
[patent_doc_number] => 20210149754
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-05-20
[patent_title] => IDENTIFICATION OF CONSTITUENT EVENTS IN AN EVENT STORM IN OPERATIONS MANAGEMENT
[patent_app_type] => utility
[patent_app_number] => 16/686249
[patent_app_country] => US
[patent_app_date] => 2019-11-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8937
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -20
[patent_words_short_claim] => 100
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16686249
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/686249 | Identification of constituent events in an event storm in operations management | Nov 17, 2019 | Issued |
Array
(
[id] => 16826265
[patent_doc_number] => 20210141558
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-05-13
[patent_title] => SYSTEMS AND METHODS FOR ENCODING AND DECODING DATA
[patent_app_type] => utility
[patent_app_number] => 16/682311
[patent_app_country] => US
[patent_app_date] => 2019-11-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6461
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 147
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16682311
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/682311 | Systems and methods for encoding and decoding data | Nov 12, 2019 | Issued |
Array
(
[id] => 18041196
[patent_doc_number] => 20220385413
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-12-01
[patent_title] => METHOD AND APPARATUS FOR INDICATING SIDELINK HYBRID AUTOMATIC REPEAT REQUEST (HARQ) FEEDBACK
[patent_app_type] => utility
[patent_app_number] => 17/775499
[patent_app_country] => US
[patent_app_date] => 2019-11-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12833
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17775499
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/775499 | Method and apparatus for indicating sidelink hybrid automatic repeat request (HARQ) feedback | Nov 7, 2019 | Issued |
Array
(
[id] => 17934225
[patent_doc_number] => 20220329351
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-10-13
[patent_title] => ROLLBACK FOR COMMUNICATION LINK ERROR RECOVERY IN EMULATION
[patent_app_type] => utility
[patent_app_number] => 17/754320
[patent_app_country] => US
[patent_app_date] => 2019-10-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8028
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 148
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17754320
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/754320 | ROLLBACK FOR COMMUNICATION LINK ERROR RECOVERY IN EMULATION | Oct 9, 2019 | Pending |
Array
(
[id] => 15351171
[patent_doc_number] => 20200013477
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-01-09
[patent_title] => MEMORY SYSTEM WITH DIAGNOSE COMMAND AND OPERATING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 16/572461
[patent_app_country] => US
[patent_app_date] => 2019-09-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3376
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => 0
[patent_words_short_claim] => 91
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16572461
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/572461 | Memory system with diagnose command and operating method thereof | Sep 15, 2019 | Issued |
Array
(
[id] => 17501498
[patent_doc_number] => 11290216
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-03-29
[patent_title] => Packet retransmission and memory sharing
[patent_app_type] => utility
[patent_app_number] => 16/561835
[patent_app_country] => US
[patent_app_date] => 2019-09-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 12305
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 143
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16561835
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/561835 | Packet retransmission and memory sharing | Sep 4, 2019 | Issued |
Array
(
[id] => 17964663
[patent_doc_number] => 20220345244
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-10-27
[patent_title] => IMPROVED RELIABILITY OF MULTI-CONNECTIVITY
[patent_app_type] => utility
[patent_app_number] => 17/634842
[patent_app_country] => US
[patent_app_date] => 2019-08-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13532
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -14
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17634842
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/634842 | Reliability of multi-connectivity | Aug 13, 2019 | Issued |
Array
(
[id] => 15155867
[patent_doc_number] => 20190356411
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-11-21
[patent_title] => BROADCAST SYSTEM AND METHOD FOR ERROR CORRECTION USING SEPARATELY RECEIVED REDUNDANT DATA AND BROADCAST DATA
[patent_app_type] => utility
[patent_app_number] => 16/530343
[patent_app_country] => US
[patent_app_date] => 2019-08-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 14540
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -20
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16530343
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/530343 | Broadcast system and method for error correction using separately received redundant data and broadcast data | Aug 1, 2019 | Issued |
Array
(
[id] => 16543376
[patent_doc_number] => 20200409791
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-12-31
[patent_title] => Serial Storage Node Processing of Data Functions
[patent_app_type] => utility
[patent_app_number] => 16/451891
[patent_app_country] => US
[patent_app_date] => 2019-06-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 22686
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 161
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16451891
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/451891 | Serial storage node processing of data functions | Jun 24, 2019 | Issued |
Array
(
[id] => 17379887
[patent_doc_number] => 11237903
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-02-01
[patent_title] => Technologies for providing ECC pre-provisioning and handling for cross-point memory and compute operations
[patent_app_type] => utility
[patent_app_number] => 16/451545
[patent_app_country] => US
[patent_app_date] => 2019-06-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 6288
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 159
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16451545
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/451545 | Technologies for providing ECC pre-provisioning and handling for cross-point memory and compute operations | Jun 24, 2019 | Issued |
Array
(
[id] => 17003240
[patent_doc_number] => 11082071
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-08-03
[patent_title] => Quality of service (QoS) aware data storage decoder
[patent_app_type] => utility
[patent_app_number] => 16/450722
[patent_app_country] => US
[patent_app_date] => 2019-06-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 8401
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 211
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16450722
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/450722 | Quality of service (QoS) aware data storage decoder | Jun 23, 2019 | Issued |
Array
(
[id] => 16586882
[patent_doc_number] => 20210021284
[patent_country] => US
[patent_kind] => A9
[patent_issue_date] => 2021-01-21
[patent_title] => BIT INTERLEAVER FOR LOW-DENSITY PARITY CHECK CODEWORD HAVING LENGTH OF 16200 AND CODE RATE OF 3/15 AND 64-SYMBOL MAPPING, AND BIT INTERLEAVING METHOD USING SAME
[patent_app_type] => utility
[patent_app_number] => 16/435283
[patent_app_country] => US
[patent_app_date] => 2019-06-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5661
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -5
[patent_words_short_claim] => 77
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16435283
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/435283 | Bit interleaver for low-density parity check codeword having length of 16200 and code rate of 3/15 and 64-symbol mapping, and bit interleaving method using same | Jun 6, 2019 | Issued |
Array
(
[id] => 16586882
[patent_doc_number] => 20210021284
[patent_country] => US
[patent_kind] => A9
[patent_issue_date] => 2021-01-21
[patent_title] => BIT INTERLEAVER FOR LOW-DENSITY PARITY CHECK CODEWORD HAVING LENGTH OF 16200 AND CODE RATE OF 3/15 AND 64-SYMBOL MAPPING, AND BIT INTERLEAVING METHOD USING SAME
[patent_app_type] => utility
[patent_app_number] => 16/435283
[patent_app_country] => US
[patent_app_date] => 2019-06-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5661
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -5
[patent_words_short_claim] => 77
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16435283
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/435283 | Bit interleaver for low-density parity check codeword having length of 16200 and code rate of 3/15 and 64-symbol mapping, and bit interleaving method using same | Jun 6, 2019 | Issued |
Array
(
[id] => 15182029
[patent_doc_number] => 20190361606
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-11-28
[patent_title] => ERASURE CODING MAGNETIC TAPES FOR MINIMUM LATENCY AND ADAPTIVE PARITY PROTECTION FEEDBACK
[patent_app_type] => utility
[patent_app_number] => 16/421685
[patent_app_country] => US
[patent_app_date] => 2019-05-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 20977
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -23
[patent_words_short_claim] => 98
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16421685
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/421685 | Erasure coding magnetic tapes for minimum latency and adaptive parity protection feedback | May 23, 2019 | Issued |
Array
(
[id] => 16739650
[patent_doc_number] => 10965324
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-03-30
[patent_title] => Memory controller, memory system, and memory control method
[patent_app_type] => utility
[patent_app_number] => 16/419717
[patent_app_country] => US
[patent_app_date] => 2019-05-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 16
[patent_no_of_words] => 7040
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 201
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16419717
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/419717 | Memory controller, memory system, and memory control method | May 21, 2019 | Issued |
Array
(
[id] => 18874450
[patent_doc_number] => 11862271
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-01-02
[patent_title] => Memory testing techniques
[patent_app_type] => utility
[patent_app_number] => 16/418833
[patent_app_country] => US
[patent_app_date] => 2019-05-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 7766
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 149
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16418833
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/418833 | Memory testing techniques | May 20, 2019 | Issued |
Array
(
[id] => 17209500
[patent_doc_number] => 11169873
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-11-09
[patent_title] => Method and system for extending lifespan and enhancing throughput in a high-density solid state drive
[patent_app_type] => utility
[patent_app_number] => 16/418602
[patent_app_country] => US
[patent_app_date] => 2019-05-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 13
[patent_no_of_words] => 7099
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 267
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16418602
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/418602 | Method and system for extending lifespan and enhancing throughput in a high-density solid state drive | May 20, 2019 | Issued |
Array
(
[id] => 14724025
[patent_doc_number] => 20190253076
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-08-15
[patent_title] => BIT INTERLEAVER FOR LOW-DENSITY PARITY CHECK CODEWORD HAVING LENGTH OF 16200 AND CODE RATE OF 3/15 AND QUADRATURE PHASE SHIFT KEYING, AND BIT INTERLEAVING METHOD USING SAME
[patent_app_type] => utility
[patent_app_number] => 16/397557
[patent_app_country] => US
[patent_app_date] => 2019-04-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5685
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -3
[patent_words_short_claim] => 179
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16397557
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/397557 | Bit interleaver for low-density parity check codeword having length of 16200 and code rate of 3/15 and quadrature phase shift keying, and bit interleaving method using same | Apr 28, 2019 | Issued |
Array
(
[id] => 15090593
[patent_doc_number] => 20190340107
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-11-07
[patent_title] => SIGNAL CONTROL CIRCUIT
[patent_app_type] => utility
[patent_app_number] => 16/392742
[patent_app_country] => US
[patent_app_date] => 2019-04-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5459
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -4
[patent_words_short_claim] => 133
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16392742
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/392742 | SIGNAL CONTROL CIRCUIT | Apr 23, 2019 | Abandoned |