Search

Russell G. Fiebig

Examiner (ID: 14740, Phone: (571)270-5366 , Office: P/1655 )

Most Active Art Unit
1655
Art Unit(s)
1655
Total Applications
1057
Issued Applications
630
Pending Applications
106
Abandoned Applications
368

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 14752585 [patent_doc_number] => 20190259466 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-22 [patent_title] => SEPARABLE ROBUST CODING [patent_app_type] => utility [patent_app_number] => 16/334081 [patent_app_country] => US [patent_app_date] => 2017-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14455 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16334081 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/334081
SEPARABLE ROBUST CODING Sep 18, 2017 Abandoned
Array ( [id] => 13723685 [patent_doc_number] => 20170372798 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-12-28 [patent_title] => MEMORY DEVICE AND MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 15/699833 [patent_app_country] => US [patent_app_date] => 2017-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11185 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15699833 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/699833
Memory device and memory system Sep 7, 2017 Issued
Array ( [id] => 13910899 [patent_doc_number] => 20190044654 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-07 [patent_title] => ADAPTABLE FORWARD ERROR CORRECTION [patent_app_type] => utility [patent_app_number] => 15/668634 [patent_app_country] => US [patent_app_date] => 2017-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3011 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15668634 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/668634
Adaptable forward error correction Aug 2, 2017 Issued
Array ( [id] => 14121851 [patent_doc_number] => 10247780 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-02 [patent_title] => Re-programmable self-test [patent_app_type] => utility [patent_app_number] => 15/666789 [patent_app_country] => US [patent_app_date] => 2017-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1444 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15666789 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/666789
Re-programmable self-test Aug 1, 2017 Issued
Array ( [id] => 16248098 [patent_doc_number] => 10747456 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-08-18 [patent_title] => Memory controller, memory module, and memory system and operation methods thereof [patent_app_type] => utility [patent_app_number] => 15/666076 [patent_app_country] => US [patent_app_date] => 2017-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5751 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 278 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15666076 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/666076
Memory controller, memory module, and memory system and operation methods thereof Jul 31, 2017 Issued
Array ( [id] => 17100876 [patent_doc_number] => 20210288667 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-16 [patent_title] => ENCODING METHOD AND DEVICE, DECODING METHOD AND DEVICE, AND STORAGE MEDIUM [patent_app_type] => utility [patent_app_number] => 16/325030 [patent_app_country] => US [patent_app_date] => 2017-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12572 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16325030 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/325030
Encoding method and device, decoding method and device, and storage medium Jul 31, 2017 Issued
Array ( [id] => 15822625 [patent_doc_number] => 10636506 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-04-28 [patent_title] => Methods for testing a storage unit and apparatuses using the same [patent_app_type] => utility [patent_app_number] => 15/663958 [patent_app_country] => US [patent_app_date] => 2017-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 3580 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15663958 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/663958
Methods for testing a storage unit and apparatuses using the same Jul 30, 2017 Issued
Array ( [id] => 15515275 [patent_doc_number] => 10564219 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-18 [patent_title] => Time-aligning communication channels [patent_app_type] => utility [patent_app_number] => 15/661198 [patent_app_country] => US [patent_app_date] => 2017-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6397 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 257 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15661198 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/661198
Time-aligning communication channels Jul 26, 2017 Issued
Array ( [id] => 13556457 [patent_doc_number] => 20180329776 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-15 [patent_title] => NON-VOLATILE MEMORY APPARATUS AND READING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 15/662254 [patent_app_country] => US [patent_app_date] => 2017-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8679 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15662254 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/662254
Non-volatile memory apparatus and reading method thereof Jul 26, 2017 Issued
Array ( [id] => 13614875 [patent_doc_number] => 20180358988 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-12-13 [patent_title] => Parameterized Iterative Message Passing Decoder [patent_app_type] => utility [patent_app_number] => 15/617629 [patent_app_country] => US [patent_app_date] => 2017-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13363 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15617629 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/617629
Parameterized iterative message passing decoder Jun 7, 2017 Issued
Array ( [id] => 14669279 [patent_doc_number] => 10372541 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-08-06 [patent_title] => Storage device storing data using raid [patent_app_type] => utility [patent_app_number] => 15/616268 [patent_app_country] => US [patent_app_date] => 2017-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 12471 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15616268 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/616268
Storage device storing data using raid Jun 6, 2017 Issued
Array ( [id] => 14982535 [patent_doc_number] => 10445179 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-15 [patent_title] => Securely storing data in a dispersed storage network [patent_app_type] => utility [patent_app_number] => 15/612082 [patent_app_country] => US [patent_app_date] => 2017-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 76 [patent_figures_cnt] => 87 [patent_no_of_words] => 59979 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 228 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15612082 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/612082
Securely storing data in a dispersed storage network Jun 1, 2017 Issued
Array ( [id] => 14300405 [patent_doc_number] => 10290333 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-05-14 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 15/612150 [patent_app_country] => US [patent_app_date] => 2017-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6117 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15612150 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/612150
Semiconductor device Jun 1, 2017 Issued
Array ( [id] => 12153613 [patent_doc_number] => 20180024877 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-25 [patent_title] => 'OPTIMIZE DATA PROTECTION LAYOUTS BASED ON DISTRIBUTED FLASH WEAR LEVELING' [patent_app_type] => utility [patent_app_number] => 15/592069 [patent_app_country] => US [patent_app_date] => 2017-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 12665 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15592069 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/592069
Optimize data protection layouts based on distributed flash wear leveling May 9, 2017 Issued
Array ( [id] => 11747272 [patent_doc_number] => 20170201346 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-07-13 [patent_title] => 'ERROR-CORRECTING CODE' [patent_app_type] => utility [patent_app_number] => 15/472285 [patent_app_country] => US [patent_app_date] => 2017-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7398 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15472285 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/472285
Error-correcting code Mar 28, 2017 Issued
Array ( [id] => 13244491 [patent_doc_number] => 10135465 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-11-20 [patent_title] => Error correction methods and apparatuses using first and second decoders [patent_app_type] => utility [patent_app_number] => 15/434210 [patent_app_country] => US [patent_app_date] => 2017-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5243 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15434210 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/434210
Error correction methods and apparatuses using first and second decoders Feb 15, 2017 Issued
Array ( [id] => 13972921 [patent_doc_number] => 10215808 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-02-26 [patent_title] => Scan test circuit, scan test method, and method of designing scan test circuit [patent_app_type] => utility [patent_app_number] => 15/411259 [patent_app_country] => US [patent_app_date] => 2017-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 8216 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 275 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15411259 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/411259
Scan test circuit, scan test method, and method of designing scan test circuit Jan 19, 2017 Issued
Array ( [id] => 11840941 [patent_doc_number] => 20170222662 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-03 [patent_title] => 'DATA DEPENDENCY MITIGATION IN DECODER ARCHITECTURE FOR GENERALIZED PRODUCT CODES FOR FLASH STORAGE' [patent_app_type] => utility [patent_app_number] => 15/411773 [patent_app_country] => US [patent_app_date] => 2017-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 8132 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15411773 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/411773
Data dependency mitigation in decoder architecture for generalized product codes for flash storage Jan 19, 2017 Issued
Array ( [id] => 13304177 [patent_doc_number] => 20180203625 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-07-19 [patent_title] => STORAGE SYSTEM WITH MULTI-DIMENSIONAL DATA PROTECTION MECHANISM AND METHOD OF OPERATION THEREOF [patent_app_type] => utility [patent_app_number] => 15/410528 [patent_app_country] => US [patent_app_date] => 2017-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7272 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -27 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15410528 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/410528
STORAGE SYSTEM WITH MULTI-DIMENSIONAL DATA PROTECTION MECHANISM AND METHOD OF OPERATION THEREOF Jan 18, 2017 Abandoned
Array ( [id] => 14035995 [patent_doc_number] => 10229750 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-03-12 [patent_title] => Memory management architecture for use with a diagnostic tool [patent_app_type] => utility [patent_app_number] => 15/409118 [patent_app_country] => US [patent_app_date] => 2017-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4970 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 309 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15409118 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/409118
Memory management architecture for use with a diagnostic tool Jan 17, 2017 Issued
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