Russell G. Fiebig

Array ( [id] => 20161175 [patent_doc_number] => 12387808 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-12 [patent_title] => Data correcting device and data correcting method thereof [patent_app_type] => utility [patent_app_number] => 18/480506 [patent_app_country] => US [patent_app_date] => 2023-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1242 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18480506 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19919070 [patent_doc_number] => 12294457 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-06 [patent_title] => Techniques for stereo on peripheral devices [patent_app_type] => utility [patent_app_number] => 18/478141 [patent_app_country] => US [patent_app_date] => 2023-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 17986 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 315 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18478141 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19465590 [patent_doc_number] => 20240319260 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-26 [patent_title] => STATE TRANSITION CONTROL FOR PARAMETRIC MEASUREMENT UNIT [patent_app_type] => utility [patent_app_number] => 18/478825 [patent_app_country] => US [patent_app_date] => 2023-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6249 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18478825 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19583346 [patent_doc_number] => 12149482 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-19 [patent_title] => Code block grouping and feedback that support efficient retransmissions [patent_app_type] => utility [patent_app_number] => 18/471277 [patent_app_country] => US [patent_app_date] => 2023-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 19945 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 231 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18471277 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20470050 [patent_doc_number] => 12526093 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-01-13 [patent_title] => Periodic frequency domain dependent block error rate detection and mitigation [patent_app_type] => utility [patent_app_number] => 18/469387 [patent_app_country] => US [patent_app_date] => 2023-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 23 [patent_no_of_words] => 7575 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18469387 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19162013 [patent_doc_number] => 20240154720 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-09 [patent_title] => Methods for Reliable Low Latency Data Delivery Using Erasure Codes and Feedback [patent_app_type] => utility [patent_app_number] => 18/467935 [patent_app_country] => US [patent_app_date] => 2023-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18681 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -31 [patent_words_short_claim] => 437 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18467935 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19851579 [patent_doc_number] => 20250096930 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-20 [patent_title] => SYSTEMATIC POLAR CODES FOR RATELESS WIRELESS COMMUNICATIONS [patent_app_type] => utility [patent_app_number] => 18/467365 [patent_app_country] => US [patent_app_date] => 2023-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 28795 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18467365 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19978291 [patent_doc_number] => 12345765 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-01 [patent_title] => Determination device, test system, and generation device [patent_app_type] => utility [patent_app_number] => 18/459130 [patent_app_country] => US [patent_app_date] => 2023-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 30 [patent_no_of_words] => 12973 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18459130 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19978291 [patent_doc_number] => 12345765 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-01 [patent_title] => Determination device, test system, and generation device [patent_app_type] => utility [patent_app_number] => 18/459130 [patent_app_country] => US [patent_app_date] => 2023-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 30 [patent_no_of_words] => 12973 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18459130 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19529577 [patent_doc_number] => 20240353479 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-24 [patent_title] => ON-CHIP FAULT DETECTION DUE TO MALFUNCTIONS ON CHIP PINS [patent_app_type] => utility [patent_app_number] => 18/458382 [patent_app_country] => US [patent_app_date] => 2023-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11967 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18458382 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18989071 [patent_doc_number] => 20240061040 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-22 [patent_title] => INTEGRATED CIRCUIT PACKAGE FOR SCAN TESTING SEMICONDUCTOR CHIP, OPERATING METHOD OF INTEGRATED CIRCUIT PACKAGE, AND INTEGRATED CIRCUIT [patent_app_type] => utility [patent_app_number] => 18/450043 [patent_app_country] => US [patent_app_date] => 2023-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6073 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18450043 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19645015 [patent_doc_number] => 20240419535 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-19 [patent_title] => EARLY DETECTION OF ROOM TEMPERATURE DATA RETENTION PHENOMENA [patent_app_type] => utility [patent_app_number] => 18/449491 [patent_app_country] => US [patent_app_date] => 2023-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6534 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18449491 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18787989 [patent_doc_number] => 20230376379 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-23 [patent_title] => STORAGE SYSTEM ACCOMMODATING DIFFERING TYPES OF STORAGE [patent_app_type] => utility [patent_app_number] => 18/362772 [patent_app_country] => US [patent_app_date] => 2023-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9351 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18362772 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19646271 [patent_doc_number] => 20240420791 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-19 [patent_title] => Data Storage Device and Method for Host-Managed Data Integrity [patent_app_type] => utility [patent_app_number] => 18/226370 [patent_app_country] => US [patent_app_date] => 2023-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5961 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18226370 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20507344 [patent_doc_number] => 12541621 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-02-03 [patent_title] => Enhanced end to end protection in key value storage devices [patent_app_type] => utility [patent_app_number] => 18/359167 [patent_app_country] => US [patent_app_date] => 2023-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 2318 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18359167 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20359960 [patent_doc_number] => 12475964 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-18 [patent_title] => Bypass buffer for worn out codewords [patent_app_type] => utility [patent_app_number] => 18/359251 [patent_app_country] => US [patent_app_date] => 2023-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 7021 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18359251 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19858765 [patent_doc_number] => 12261626 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-25 [patent_title] => Coding circuit and memory device including the same [patent_app_type] => utility [patent_app_number] => 18/357763 [patent_app_country] => US [patent_app_date] => 2023-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 3059 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18357763 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20110125 [patent_doc_number] => 12360846 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-15 [patent_title] => Apparatus, system, and method for operating memory system [patent_app_type] => utility [patent_app_number] => 18/219579 [patent_app_country] => US [patent_app_date] => 2023-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 7086 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18219579 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18727954 [patent_doc_number] => 20230342247 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-26 [patent_title] => SYSTEMS AND METHODS FOR AN ECC ARCHITECTURE WITH MEMORY MAPPING [patent_app_type] => utility [patent_app_number] => 18/216626 [patent_app_country] => US [patent_app_date] => 2023-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6727 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18216626 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18727955 [patent_doc_number] => 20230342248 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-26 [patent_title] => SYSTEMS AND METHODS FOR AN ECC ARCHITECTURE WITH MEMORY MAPPING [patent_app_type] => utility [patent_app_number] => 18/216628 [patent_app_country] => US [patent_app_date] => 2023-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6728 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18216628 [rel_patent_id] =>[rel_patent_doc_number] =>)