Search

Russell G. Fiebig

Examiner (ID: 14740, Phone: (571)270-5366 , Office: P/1655 )

Most Active Art Unit
1655
Art Unit(s)
1655
Total Applications
1057
Issued Applications
630
Pending Applications
106
Abandoned Applications
368

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18447472 [patent_doc_number] => 11683053 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-20 [patent_title] => Memory controller, memory system, and memory control method [patent_app_type] => utility [patent_app_number] => 17/178604 [patent_app_country] => US [patent_app_date] => 2021-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 16 [patent_no_of_words] => 7063 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 279 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17178604 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/178604
Memory controller, memory system, and memory control method Feb 17, 2021 Issued
Array ( [id] => 17691887 [patent_doc_number] => 20220199180 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-23 [patent_title] => PEAK POWER MANAGEMENT CONNECTIVITY CHECK IN A MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/248728 [patent_app_country] => US [patent_app_date] => 2021-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8494 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17248728 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/248728
Peak power management connectivity check in a memory device Feb 3, 2021 Issued
Array ( [id] => 18864722 [patent_doc_number] => 20230419159 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-28 [patent_title] => METHOD AND APPARATUS FOR OPTIMIZING BIAS ERROR-BASED QUANTUM ERROR CORRECTION CODE [patent_app_type] => utility [patent_app_number] => 18/253244 [patent_app_country] => US [patent_app_date] => 2021-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5799 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18253244 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/253244
Method and apparatus for optimizing bias error-based quantum error correction code Jan 24, 2021 Issued
Array ( [id] => 18689104 [patent_doc_number] => 11784856 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-10 [patent_title] => Area efficient high-speed sequence generator and error checker [patent_app_type] => utility [patent_app_number] => 17/156437 [patent_app_country] => US [patent_app_date] => 2021-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6178 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17156437 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/156437
Area efficient high-speed sequence generator and error checker Jan 21, 2021 Issued
Array ( [id] => 19926959 [patent_doc_number] => 12301259 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-13 [patent_title] => Decoding apparatus, decoding method and program [patent_app_type] => utility [patent_app_number] => 18/258967 [patent_app_country] => US [patent_app_date] => 2021-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 33 [patent_no_of_words] => 8140 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18258967 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/258967
Decoding apparatus, decoding method and program Jan 3, 2021 Issued
Array ( [id] => 19458919 [patent_doc_number] => 12099408 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-24 [patent_title] => Memory striping approach that interleaves sub protected data words [patent_app_type] => utility [patent_app_number] => 17/132982 [patent_app_country] => US [patent_app_date] => 2020-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 9242 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17132982 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/132982
Memory striping approach that interleaves sub protected data words Dec 22, 2020 Issued
Array ( [id] => 16764223 [patent_doc_number] => 20210109804 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-15 [patent_title] => INTEGRATION ERROR DETECTION AND CORRECTION SYSTEM [patent_app_type] => utility [patent_app_number] => 17/129255 [patent_app_country] => US [patent_app_date] => 2020-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7962 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17129255 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/129255
INTEGRATION ERROR DETECTION AND CORRECTION SYSTEM Dec 20, 2020 Abandoned
Array ( [id] => 19197729 [patent_doc_number] => 11994967 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-28 [patent_title] => Protocol aware oscilloscope for busses with sideband and control signals for error detection [patent_app_type] => utility [patent_app_number] => 17/094677 [patent_app_country] => US [patent_app_date] => 2020-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3752 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17094677 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/094677
Protocol aware oscilloscope for busses with sideband and control signals for error detection Nov 9, 2020 Issued
Array ( [id] => 16690591 [patent_doc_number] => 20210073069 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-11 [patent_title] => OPTIMIZE DATA PROTECTION LAYOUTS BASED ON DISTRIBUTED FLASH WEAR LEVELING [patent_app_type] => utility [patent_app_number] => 17/085906 [patent_app_country] => US [patent_app_date] => 2020-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12423 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17085906 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/085906
Optimize data protection layouts based on distributed flash wear leveling Oct 29, 2020 Issued
Array ( [id] => 16561116 [patent_doc_number] => 20210006265 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-07 [patent_title] => BIT INTERLEAVER FOR LOW-DENSITY PARITY CHECK CODEWORD HAVING LENGTH OF 16200 AND CODE RATE OF 3/15 AND QUADRATURE PHASE SHIFT KEYING, AND BIT INTERLEAVING METHOD USING SAME [patent_app_type] => utility [patent_app_number] => 17/024517 [patent_app_country] => US [patent_app_date] => 2020-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5600 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17024517 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/024517
Bit interleaver for low-density parity check codeword having length of 16200 and code rate of 3/15 and quadrature phase shift keying, and bit interleaving method using same Sep 16, 2020 Issued
Array ( [id] => 16874435 [patent_doc_number] => 20210167902 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-03 [patent_title] => ELECTRONIC COMMUNICATION DEVICE, MAGNETIC DISK DEVICE AND SERIAL COMMUNICATION METHOD [patent_app_type] => utility [patent_app_number] => 17/012218 [patent_app_country] => US [patent_app_date] => 2020-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9938 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17012218 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/012218
Electronic communication device, magnetic disk device and serial communication method Sep 3, 2020 Issued
Array ( [id] => 18654028 [patent_doc_number] => 20230299873 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-21 [patent_title] => CODEWORD-SETTING TECHNIQUE FOR HARQ OPERATION [patent_app_type] => utility [patent_app_number] => 17/769267 [patent_app_country] => US [patent_app_date] => 2020-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 22643 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17769267 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/769267
Codeword-setting technique for HARQ operation Aug 27, 2020 Issued
Array ( [id] => 16693071 [patent_doc_number] => 20210075550 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-11 [patent_title] => COMMUNICATIONS SIGNAL RETRANSMISSIONS USING STATUS REPORTS [patent_app_type] => utility [patent_app_number] => 16/991658 [patent_app_country] => US [patent_app_date] => 2020-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9509 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16991658 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/991658
Communications signal retransmissions using status reports Aug 11, 2020 Issued
Array ( [id] => 17605940 [patent_doc_number] => 11334429 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-17 [patent_title] => Non-volatile memory apparatus and reading method thereof [patent_app_type] => utility [patent_app_number] => 16/985241 [patent_app_country] => US [patent_app_date] => 2020-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 8427 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 337 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16985241 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/985241
Non-volatile memory apparatus and reading method thereof Aug 4, 2020 Issued
Array ( [id] => 17358926 [patent_doc_number] => 20220019722 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-20 [patent_title] => TEMPERATURE-BASED ON BOARD PLACEMENT OF MEMORY DEVICES [patent_app_type] => utility [patent_app_number] => 16/930158 [patent_app_country] => US [patent_app_date] => 2020-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9322 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16930158 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/930158
Temperature-based on board placement of memory devices Jul 14, 2020 Issued
Array ( [id] => 17338122 [patent_doc_number] => 20220004453 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-06 [patent_title] => EFFICIENT ERROR REPORTING IN A LINK INTERFACE [patent_app_type] => utility [patent_app_number] => 16/921316 [patent_app_country] => US [patent_app_date] => 2020-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7432 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16921316 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/921316
Efficient error reporting in a link interface Jul 5, 2020 Issued
Array ( [id] => 16365232 [patent_doc_number] => 20200321983 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-08 [patent_title] => ENCODING AND DECODING OF HAMMING DISTANCE-BASED BINARY REPRESENTATIONS OF NUMBERS [patent_app_type] => utility [patent_app_number] => 16/909815 [patent_app_country] => US [patent_app_date] => 2020-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13825 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 267 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16909815 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/909815
Encoding and decoding of hamming distance-based binary representations of numbers Jun 22, 2020 Issued
Array ( [id] => 18048680 [patent_doc_number] => 11522643 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-06 [patent_title] => Wireless communication device and wireless communication method [patent_app_type] => utility [patent_app_number] => 16/908851 [patent_app_country] => US [patent_app_date] => 2020-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3397 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16908851 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/908851
Wireless communication device and wireless communication method Jun 22, 2020 Issued
Array ( [id] => 16509933 [patent_doc_number] => 20200389189 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-10 [patent_title] => Methods and Devices for Operating in Beam Hopping Configuration and Under a Range of Signal to Noise Ratio Conditions [patent_app_type] => utility [patent_app_number] => 16/904738 [patent_app_country] => US [patent_app_date] => 2020-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9953 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16904738 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/904738
Methods and devices for operating in beam hopping configuration and under a range of signal to noise ratio conditions Jun 17, 2020 Issued
Array ( [id] => 17470742 [patent_doc_number] => 11277228 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-15 [patent_title] => Information processing device, communication system, information processing method, and program [patent_app_type] => utility [patent_app_number] => 16/879770 [patent_app_country] => US [patent_app_date] => 2020-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 23 [patent_no_of_words] => 19608 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 232 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16879770 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/879770
Information processing device, communication system, information processing method, and program May 20, 2020 Issued
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