Search

Russell Marc Kobert

Examiner (ID: 14392)

Most Active Art Unit
2858
Art Unit(s)
2858, 2829, 2213
Total Applications
684
Issued Applications
583
Pending Applications
38
Abandoned Applications
63

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6107813 [patent_doc_number] => 20020171443 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-11-21 [patent_title] => 'Connector assembly with decoupling capacitors' [patent_app_type] => new [patent_app_number] => 09/858224 [patent_app_country] => US [patent_app_date] => 2001-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3081 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0171/20020171443.pdf [firstpage_image] =>[orig_patent_app_number] => 09858224 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/858224
Connector assembly with decoupling capacitors May 14, 2001 Issued
Array ( [id] => 1285412 [patent_doc_number] => 06642728 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-11-04 [patent_title] => 'Holder of electroconductive contactor, and method for producing the same' [patent_app_type] => B1 [patent_app_number] => 09/744825 [patent_app_country] => US [patent_app_date] => 2001-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 4352 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/642/06642728.pdf [firstpage_image] =>[orig_patent_app_number] => 09744825 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/744825
Holder of electroconductive contactor, and method for producing the same May 10, 2001 Issued
Array ( [id] => 1422814 [patent_doc_number] => 06509750 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-01-21 [patent_title] => 'Apparatus for detecting defects in patterned substrates' [patent_app_type] => B1 [patent_app_number] => 09/846487 [patent_app_country] => US [patent_app_date] => 2001-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 15 [patent_no_of_words] => 9554 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/509/06509750.pdf [firstpage_image] =>[orig_patent_app_number] => 09846487 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/846487
Apparatus for detecting defects in patterned substrates Apr 29, 2001 Issued
Array ( [id] => 6748408 [patent_doc_number] => 20030042928 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-03-06 [patent_title] => 'S-parameter microscopy for semiconductor devices' [patent_app_type] => new [patent_app_number] => 09/840563 [patent_app_country] => US [patent_app_date] => 2001-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 40 [patent_no_of_words] => 7599 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 37 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0042/20030042928.pdf [firstpage_image] =>[orig_patent_app_number] => 09840563 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/840563
S-parameter microscopy for semiconductor devices Apr 22, 2001 Issued
Array ( [id] => 6171205 [patent_doc_number] => 20020153914 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-24 [patent_title] => 'AC testing of leakage current' [patent_app_type] => new [patent_app_number] => 09/838730 [patent_app_country] => US [patent_app_date] => 2001-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5414 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0153/20020153914.pdf [firstpage_image] =>[orig_patent_app_number] => 09838730 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/838730
AC testing of leakage current in integrated circuits using RC time constant Apr 18, 2001 Issued
Array ( [id] => 1198125 [patent_doc_number] => 06727722 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-04-27 [patent_title] => 'Process of testing a semiconductor wafer of IC dies' [patent_app_type] => B2 [patent_app_number] => 09/835802 [patent_app_country] => US [patent_app_date] => 2001-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 79 [patent_no_of_words] => 9380 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/727/06727722.pdf [firstpage_image] =>[orig_patent_app_number] => 09835802 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/835802
Process of testing a semiconductor wafer of IC dies Apr 15, 2001 Issued
Array ( [id] => 1267032 [patent_doc_number] => 06661247 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-12-09 [patent_title] => 'Semiconductor testing device' [patent_app_type] => B2 [patent_app_number] => 09/828221 [patent_app_country] => US [patent_app_date] => 2001-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 80 [patent_no_of_words] => 20503 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/661/06661247.pdf [firstpage_image] =>[orig_patent_app_number] => 09828221 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/828221
Semiconductor testing device Apr 8, 2001 Issued
Array ( [id] => 1074203 [patent_doc_number] => 06838869 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-01-04 [patent_title] => 'Clocked based method and devices for measuring voltage-variable capacitances and other on-chip parameters' [patent_app_type] => utility [patent_app_number] => 09/825027 [patent_app_country] => US [patent_app_date] => 2001-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 38 [patent_figures_cnt] => 38 [patent_no_of_words] => 31643 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/838/06838869.pdf [firstpage_image] =>[orig_patent_app_number] => 09825027 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/825027
Clocked based method and devices for measuring voltage-variable capacitances and other on-chip parameters Apr 1, 2001 Issued
Array ( [id] => 7063788 [patent_doc_number] => 20010043077 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-11-22 [patent_title] => 'Method for in-line testing of flip-chip semiconductor assemblies' [patent_app_type] => new [patent_app_number] => 09/819472 [patent_app_country] => US [patent_app_date] => 2001-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2681 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0043/20010043077.pdf [firstpage_image] =>[orig_patent_app_number] => 09819472 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/819472
Method for in-line testing of flip-chip semiconductor assemblies Mar 27, 2001 Issued
Array ( [id] => 6959776 [patent_doc_number] => 20010011898 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-08-09 [patent_title] => 'IC socket, a test method using the same and an IC socket mounting mechanism' [patent_app_type] => new [patent_app_number] => 09/809204 [patent_app_country] => US [patent_app_date] => 2001-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 11089 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0011/20010011898.pdf [firstpage_image] =>[orig_patent_app_number] => 09809204 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/809204
IC socket, a test method using the same and an IC socket mounting mechanism Mar 15, 2001 Issued
Array ( [id] => 7012819 [patent_doc_number] => 20010050570 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-12-13 [patent_title] => 'Method of forming an apparatus configured to engage an electrically conductive pad on a semiconductive substrate and a method of engaging electrically conductive pads on a semiconductive substrate' [patent_app_type] => new [patent_app_number] => 09/808879 [patent_app_country] => US [patent_app_date] => 2001-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3825 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0050/20010050570.pdf [firstpage_image] =>[orig_patent_app_number] => 09808879 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/808879
Method of forming an apparatus configured to engage an electrically conductive pad on a semiconductive substrate and a method of engaging electrically conductive pads on a semiconductive substrate Mar 13, 2001 Issued
Array ( [id] => 1285312 [patent_doc_number] => 06642708 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-11-04 [patent_title] => 'Marker system for test fixture' [patent_app_type] => B1 [patent_app_number] => 09/782785 [patent_app_country] => US [patent_app_date] => 2001-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5683 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/642/06642708.pdf [firstpage_image] =>[orig_patent_app_number] => 09782785 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/782785
Marker system for test fixture Feb 13, 2001 Issued
Array ( [id] => 1598355 [patent_doc_number] => 06492824 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-12-10 [patent_title] => 'Adapter base for receiving electronic test objects' [patent_app_type] => B1 [patent_app_number] => 09/719930 [patent_app_country] => US [patent_app_date] => 2001-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 4 [patent_no_of_words] => 1347 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/492/06492824.pdf [firstpage_image] =>[orig_patent_app_number] => 09719930 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/719930
Adapter base for receiving electronic test objects Jan 23, 2001 Issued
Array ( [id] => 6887383 [patent_doc_number] => 20010008377 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-07-19 [patent_title] => 'Non-contact board inspection probe' [patent_app_type] => new-utility [patent_app_number] => 09/765290 [patent_app_country] => US [patent_app_date] => 2001-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5753 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0008/20010008377.pdf [firstpage_image] =>[orig_patent_app_number] => 09765290 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/765290
Non-contact board inspection probe Jan 21, 2001 Issued
Array ( [id] => 1563522 [patent_doc_number] => 06362614 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-26 [patent_title] => 'Electronic probe for measuring high impedance tri-state logic circuits' [patent_app_type] => B1 [patent_app_number] => 09/755265 [patent_app_country] => US [patent_app_date] => 2001-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3414 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/362/06362614.pdf [firstpage_image] =>[orig_patent_app_number] => 09755265 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/755265
Electronic probe for measuring high impedance tri-state logic circuits Jan 4, 2001 Issued
Array ( [id] => 1418710 [patent_doc_number] => 06528986 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-03-04 [patent_title] => 'Inner component board assembly for an electric utility meter' [patent_app_type] => B2 [patent_app_number] => 09/751316 [patent_app_country] => US [patent_app_date] => 2000-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 26 [patent_no_of_words] => 6997 [patent_no_of_claims] => 60 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/528/06528986.pdf [firstpage_image] =>[orig_patent_app_number] => 09751316 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/751316
Inner component board assembly for an electric utility meter Dec 27, 2000 Issued
Array ( [id] => 6577839 [patent_doc_number] => 20020084795 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-07-04 [patent_title] => 'System for and method of testing a microelectronic device using a dual probe technique' [patent_app_type] => new [patent_app_number] => 09/751355 [patent_app_country] => US [patent_app_date] => 2000-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3821 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0084/20020084795.pdf [firstpage_image] =>[orig_patent_app_number] => 09751355 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/751355
System for and method of testing a microelectronic device using a dual probe technique Dec 27, 2000 Issued
Array ( [id] => 6577794 [patent_doc_number] => 20020084792 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-07-04 [patent_title] => 'SOI die analysis of circuitry logic states via coupling through the insulator' [patent_app_type] => new [patent_app_number] => 09/751097 [patent_app_country] => US [patent_app_date] => 2000-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3230 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0084/20020084792.pdf [firstpage_image] =>[orig_patent_app_number] => 09751097 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/751097
SOI die analysis of circuitry logic states via coupling through the insulator Dec 27, 2000 Abandoned
Array ( [id] => 7012814 [patent_doc_number] => 20010050565 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-12-13 [patent_title] => 'Multi-point probe' [patent_app_type] => new [patent_app_number] => 09/750645 [patent_app_country] => US [patent_app_date] => 2000-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8143 [patent_no_of_claims] => 64 [patent_no_of_ind_claims] => 53 [patent_words_short_claim] => 18 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0050/20010050565.pdf [firstpage_image] =>[orig_patent_app_number] => 09750645 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/750645
Multi-point probe Dec 27, 2000 Abandoned
Array ( [id] => 6368376 [patent_doc_number] => 20020118034 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-08-29 [patent_title] => 'Transistor device testing employing virtual device fixturing' [patent_app_type] => new [patent_app_number] => 09/749027 [patent_app_country] => US [patent_app_date] => 2000-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4155 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 37 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0118/20020118034.pdf [firstpage_image] =>[orig_patent_app_number] => 09749027 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/749027
Transistor device testing employing virtual device fixturing Dec 25, 2000 Issued
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