
Russell Marc Kobert
Examiner (ID: 14392)
| Most Active Art Unit | 2858 |
| Art Unit(s) | 2858, 2829, 2213 |
| Total Applications | 684 |
| Issued Applications | 583 |
| Pending Applications | 38 |
| Abandoned Applications | 63 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 6723715
[patent_doc_number] => 20030206027
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-11-06
[patent_title] => 'Method of inspecting circuit pattern and inspecting instrument'
[patent_app_type] => new
[patent_app_number] => 10/430188
[patent_app_country] => US
[patent_app_date] => 2003-05-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 23
[patent_no_of_words] => 16781
[patent_no_of_claims] => 31
[patent_no_of_ind_claims] => 27
[patent_words_short_claim] => 30
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0206/20030206027.pdf
[firstpage_image] =>[orig_patent_app_number] => 10430188
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/430188 | Method of inspecting circuit pattern and inspecting instrument | May 6, 2003 | Issued |
Array
(
[id] => 1002871
[patent_doc_number] => 06909274
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-06-21
[patent_title] => 'Signal pin tester for AC defects in integrated circuits'
[patent_app_type] => utility
[patent_app_number] => 10/420431
[patent_app_country] => US
[patent_app_date] => 2003-04-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 6
[patent_no_of_words] => 3605
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 232
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/909/06909274.pdf
[firstpage_image] =>[orig_patent_app_number] => 10420431
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/420431 | Signal pin tester for AC defects in integrated circuits | Apr 20, 2003 | Issued |
Array
(
[id] => 1114034
[patent_doc_number] => 06803772
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-10-12
[patent_title] => 'Inductance measuring method'
[patent_app_type] => B2
[patent_app_number] => 10/396350
[patent_app_country] => US
[patent_app_date] => 2003-03-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 8074
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 236
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/803/06803772.pdf
[firstpage_image] =>[orig_patent_app_number] => 10396350
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/396350 | Inductance measuring method | Mar 25, 2003 | Issued |
Array
(
[id] => 6728138
[patent_doc_number] => 20030184328
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-10-02
[patent_title] => 'Near-field probe for use in scanning system'
[patent_app_type] => new
[patent_app_number] => 10/395284
[patent_app_country] => US
[patent_app_date] => 2003-03-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 5754
[patent_no_of_claims] => 39
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 161
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0184/20030184328.pdf
[firstpage_image] =>[orig_patent_app_number] => 10395284
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/395284 | Near-field probe for use in scanning system | Mar 24, 2003 | Issued |
Array
(
[id] => 1133377
[patent_doc_number] => 06788088
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-09-07
[patent_title] => 'Semiconductor device equipped with current detection function'
[patent_app_type] => B2
[patent_app_number] => 10/394029
[patent_app_country] => US
[patent_app_date] => 2003-03-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 3998
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 295
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/788/06788088.pdf
[firstpage_image] =>[orig_patent_app_number] => 10394029
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/394029 | Semiconductor device equipped with current detection function | Mar 23, 2003 | Issued |
Array
(
[id] => 677394
[patent_doc_number] => 07088117
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-08-08
[patent_title] => 'Wafer burn-in and test employing detachable cartridge'
[patent_app_type] => utility
[patent_app_number] => 10/396170
[patent_app_country] => US
[patent_app_date] => 2003-03-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 27
[patent_no_of_words] => 13867
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 140
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/088/07088117.pdf
[firstpage_image] =>[orig_patent_app_number] => 10396170
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/396170 | Wafer burn-in and test employing detachable cartridge | Mar 23, 2003 | Issued |
Array
(
[id] => 7423710
[patent_doc_number] => 20040183560
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-09-23
[patent_title] => 'Method and integrated circuit for capacitor measurement with digital readout'
[patent_app_type] => new
[patent_app_number] => 10/392206
[patent_app_country] => US
[patent_app_date] => 2003-03-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 3801
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 41
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0183/20040183560.pdf
[firstpage_image] =>[orig_patent_app_number] => 10392206
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/392206 | Method and integrated circuit for capacitor measurement with digital readout | Mar 18, 2003 | Issued |
Array
(
[id] => 779905
[patent_doc_number] => 06995580
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-02-07
[patent_title] => 'Power detectors for measuring power coupling'
[patent_app_type] => utility
[patent_app_number] => 10/390927
[patent_app_country] => US
[patent_app_date] => 2003-03-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 8
[patent_no_of_words] => 3138
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 148
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/995/06995580.pdf
[firstpage_image] =>[orig_patent_app_number] => 10390927
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/390927 | Power detectors for measuring power coupling | Mar 18, 2003 | Issued |
Array
(
[id] => 1151712
[patent_doc_number] => 06774661
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-08-10
[patent_title] => 'Initial contact method of preventing an integrated circuit chip from being thermally destroyed, in a tester, due to a defective pressed joint'
[patent_app_type] => B1
[patent_app_number] => 10/391887
[patent_app_country] => US
[patent_app_date] => 2003-03-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 13
[patent_no_of_words] => 9352
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 149
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/774/06774661.pdf
[firstpage_image] =>[orig_patent_app_number] => 10391887
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/391887 | Initial contact method of preventing an integrated circuit chip from being thermally destroyed, in a tester, due to a defective pressed joint | Mar 17, 2003 | Issued |
Array
(
[id] => 1109514
[patent_doc_number] => 06809543
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-10-26
[patent_title] => 'Abrupt power change method of preventing an integrated circuit chip from being thermally destroyed, in a tester, due to a defective pressed joint'
[patent_app_type] => B1
[patent_app_number] => 10/391884
[patent_app_country] => US
[patent_app_date] => 2003-03-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 13
[patent_no_of_words] => 9330
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 133
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/809/06809543.pdf
[firstpage_image] =>[orig_patent_app_number] => 10391884
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/391884 | Abrupt power change method of preventing an integrated circuit chip from being thermally destroyed, in a tester, due to a defective pressed joint | Mar 17, 2003 | Issued |
Array
(
[id] => 1050956
[patent_doc_number] => 06861862
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2005-03-01
[patent_title] => 'Test socket'
[patent_app_type] => utility
[patent_app_number] => 10/387841
[patent_app_country] => US
[patent_app_date] => 2003-03-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 10
[patent_no_of_words] => 2981
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 152
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/861/06861862.pdf
[firstpage_image] =>[orig_patent_app_number] => 10387841
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/387841 | Test socket | Mar 16, 2003 | Issued |
Array
(
[id] => 1273617
[patent_doc_number] => 06649430
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2003-11-18
[patent_title] => 'Characteristic evaluation apparatus for insulated gate type transistors'
[patent_app_type] => B2
[patent_app_number] => 10/350059
[patent_app_country] => US
[patent_app_date] => 2003-01-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 25
[patent_figures_cnt] => 29
[patent_no_of_words] => 16033
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 432
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/649/06649430.pdf
[firstpage_image] =>[orig_patent_app_number] => 10350059
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/350059 | Characteristic evaluation apparatus for insulated gate type transistors | Jan 23, 2003 | Issued |
Array
(
[id] => 6849686
[patent_doc_number] => 20030141888
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-07-31
[patent_title] => 'Method for in-line testing of flip-chip semiconductor assemblies'
[patent_app_type] => new
[patent_app_number] => 10/338530
[patent_app_country] => US
[patent_app_date] => 2003-01-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 2723
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 10
[patent_words_short_claim] => 55
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0141/20030141888.pdf
[firstpage_image] =>[orig_patent_app_number] => 10338530
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/338530 | Method for in-line testing of flip-chip semiconductor assemblies | Jan 7, 2003 | Issued |
Array
(
[id] => 7286959
[patent_doc_number] => 20040108868
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-06-10
[patent_title] => 'Device speed alteration by electron-hole pair injection and device heating'
[patent_app_type] => new
[patent_app_number] => 10/313933
[patent_app_country] => US
[patent_app_date] => 2002-12-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 6218
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 116
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0108/20040108868.pdf
[firstpage_image] =>[orig_patent_app_number] => 10313933
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/313933 | Device speed alteration by electron-hole pair injection and device heating | Dec 4, 2002 | Issued |
Array
(
[id] => 1041239
[patent_doc_number] => 06870357
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2005-03-22
[patent_title] => 'Method and apparatus for determining the temperature of a junction using voltage responses of the junction and a correction factor'
[patent_app_type] => utility
[patent_app_number] => 10/301831
[patent_app_country] => US
[patent_app_date] => 2002-11-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 9
[patent_no_of_words] => 5633
[patent_no_of_claims] => 33
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 49
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/870/06870357.pdf
[firstpage_image] =>[orig_patent_app_number] => 10301831
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/301831 | Method and apparatus for determining the temperature of a junction using voltage responses of the junction and a correction factor | Nov 20, 2002 | Issued |
Array
(
[id] => 1172345
[patent_doc_number] => 06750070
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-06-15
[patent_title] => 'Process for manufacturing flip-chip semiconductor assembly'
[patent_app_type] => B2
[patent_app_number] => 10/282604
[patent_app_country] => US
[patent_app_date] => 2002-10-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 2719
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 136
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/750/06750070.pdf
[firstpage_image] =>[orig_patent_app_number] => 10282604
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/282604 | Process for manufacturing flip-chip semiconductor assembly | Oct 28, 2002 | Issued |
Array
(
[id] => 6649383
[patent_doc_number] => 20030076127
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-04-24
[patent_title] => 'Method for testing a plurality of devices'
[patent_app_type] => new
[patent_app_number] => 10/278227
[patent_app_country] => US
[patent_app_date] => 2002-10-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3149
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 69
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0076/20030076127.pdf
[firstpage_image] =>[orig_patent_app_number] => 10278227
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/278227 | Method for testing a plurality of devices disposed on a wafer and connected by a common data line | Oct 22, 2002 | Issued |
Array
(
[id] => 6695196
[patent_doc_number] => 20030107390
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-06-12
[patent_title] => 'Structure of a wire clip for integrated circuit'
[patent_app_type] => new
[patent_app_number] => 10/274925
[patent_app_country] => US
[patent_app_date] => 2002-10-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 1467
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 160
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0107/20030107390.pdf
[firstpage_image] =>[orig_patent_app_number] => 10274925
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/274925 | Structure of a wire clip for integrated circuit | Oct 21, 2002 | Abandoned |
Array
(
[id] => 6709313
[patent_doc_number] => 20030169062
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-09-11
[patent_title] => 'Apparatus and method for positioning an integrated circuit for test'
[patent_app_type] => new
[patent_app_number] => 10/274433
[patent_app_country] => US
[patent_app_date] => 2002-10-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3634
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 154
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0169/20030169062.pdf
[firstpage_image] =>[orig_patent_app_number] => 10274433
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/274433 | Apparatus and method for positioning an integrated circuit for test | Oct 16, 2002 | Issued |
Array
(
[id] => 972862
[patent_doc_number] => 06937004
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-08-30
[patent_title] => 'Test mark and electronic device incorporating the same'
[patent_app_type] => utility
[patent_app_number] => 10/263832
[patent_app_country] => US
[patent_app_date] => 2002-10-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 15
[patent_no_of_words] => 4752
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 29
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/937/06937004.pdf
[firstpage_image] =>[orig_patent_app_number] => 10263832
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/263832 | Test mark and electronic device incorporating the same | Oct 3, 2002 | Issued |