Search

Russell Marc Kobert

Examiner (ID: 14392)

Most Active Art Unit
2858
Art Unit(s)
2858, 2829, 2213
Total Applications
684
Issued Applications
583
Pending Applications
38
Abandoned Applications
63

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7632552 [patent_doc_number] => 06664782 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-12-16 [patent_title] => 'Digital eddy current proximity system: apparatus and method' [patent_app_type] => B2 [patent_app_number] => 10/042514 [patent_app_country] => US [patent_app_date] => 2002-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 22 [patent_no_of_words] => 23459 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 22 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/664/06664782.pdf [firstpage_image] =>[orig_patent_app_number] => 10042514 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/042514
Digital eddy current proximity system: apparatus and method Jan 7, 2002 Issued
Array ( [id] => 6841423 [patent_doc_number] => 20030146770 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-08-07 [patent_title] => 'High temperature probe card' [patent_app_type] => new [patent_app_number] => 10/034624 [patent_app_country] => US [patent_app_date] => 2001-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4597 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0146/20030146770.pdf [firstpage_image] =>[orig_patent_app_number] => 10034624 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/034624
High temperature probe card Dec 26, 2001 Issued
Array ( [id] => 1315329 [patent_doc_number] => 06614219 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-09-02 [patent_title] => 'Metering assembly' [patent_app_type] => B2 [patent_app_number] => 10/035024 [patent_app_country] => US [patent_app_date] => 2001-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 4557 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/614/06614219.pdf [firstpage_image] =>[orig_patent_app_number] => 10035024 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/035024
Metering assembly Dec 20, 2001 Issued
Array ( [id] => 6630275 [patent_doc_number] => 20020086485 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-07-04 [patent_title] => 'Method to improve silicide formation on polysilicon' [patent_app_type] => new [patent_app_number] => 10/023825 [patent_app_country] => US [patent_app_date] => 2001-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2732 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0086/20020086485.pdf [firstpage_image] =>[orig_patent_app_number] => 10023825 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/023825
Method to improve silicide formation on polysilicon Dec 18, 2001 Issued
Array ( [id] => 1194084 [patent_doc_number] => 06731130 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-05-04 [patent_title] => 'Method of determining gate oxide thickness of an operational MOSFET' [patent_app_type] => B1 [patent_app_number] => 10/017832 [patent_app_country] => US [patent_app_date] => 2001-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3343 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/731/06731130.pdf [firstpage_image] =>[orig_patent_app_number] => 10017832 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/017832
Method of determining gate oxide thickness of an operational MOSFET Dec 11, 2001 Issued
Array ( [id] => 1345241 [patent_doc_number] => 06590380 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-07-08 [patent_title] => 'Method and apparatus for compensation of current transformer error' [patent_app_type] => B2 [patent_app_number] => 09/995930 [patent_app_country] => US [patent_app_date] => 2001-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 4765 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/590/06590380.pdf [firstpage_image] =>[orig_patent_app_number] => 09995930 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/995930
Method and apparatus for compensation of current transformer error Nov 27, 2001 Issued
Array ( [id] => 6597381 [patent_doc_number] => 20020063558 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-05-30 [patent_title] => 'Test head connection unit' [patent_app_type] => new [patent_app_number] => 09/995229 [patent_app_country] => US [patent_app_date] => 2001-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3111 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0063/20020063558.pdf [firstpage_image] =>[orig_patent_app_number] => 09995229 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/995229
Test head connection unit Nov 26, 2001 Abandoned
Array ( [id] => 5933962 [patent_doc_number] => 20020060580 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-05-23 [patent_title] => 'Probe card' [patent_app_type] => new [patent_app_number] => 09/990426 [patent_app_country] => US [patent_app_date] => 2001-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3745 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 22 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0060/20020060580.pdf [firstpage_image] =>[orig_patent_app_number] => 09990426 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/990426
Probe card Nov 20, 2001 Abandoned
Array ( [id] => 1151673 [patent_doc_number] => 06774656 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-08-10 [patent_title] => 'Self-test for leakage current of driver/receiver stages' [patent_app_type] => B2 [patent_app_number] => 09/682924 [patent_app_country] => US [patent_app_date] => 2001-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 4018 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/774/06774656.pdf [firstpage_image] =>[orig_patent_app_number] => 09682924 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/682924
Self-test for leakage current of driver/receiver stages Oct 31, 2001 Issued
Array ( [id] => 1109502 [patent_doc_number] => 06809538 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-10-26 [patent_title] => 'Active cooling to reduce leakage power' [patent_app_type] => B1 [patent_app_number] => 10/000729 [patent_app_country] => US [patent_app_date] => 2001-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 4583 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/809/06809538.pdf [firstpage_image] =>[orig_patent_app_number] => 10000729 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/000729
Active cooling to reduce leakage power Oct 30, 2001 Issued
Array ( [id] => 7610867 [patent_doc_number] => 06841990 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-01-11 [patent_title] => 'Mechanical interface for rapid replacement of RF fixture components' [patent_app_type] => utility [patent_app_number] => 10/001630 [patent_app_country] => US [patent_app_date] => 2001-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2274 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/841/06841990.pdf [firstpage_image] =>[orig_patent_app_number] => 10001630 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/001630
Mechanical interface for rapid replacement of RF fixture components Oct 30, 2001 Issued
Array ( [id] => 6171220 [patent_doc_number] => 20020153921 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-24 [patent_title] => 'Test device for testing a liquid crystal display (LCD) unit' [patent_app_type] => new [patent_app_number] => 10/021325 [patent_app_country] => US [patent_app_date] => 2001-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2027 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 21 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0153/20020153921.pdf [firstpage_image] =>[orig_patent_app_number] => 10021325 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/021325
Test device for testing a liquid crystal display (LCD) unit Oct 29, 2001 Issued
Array ( [id] => 767529 [patent_doc_number] => 07009416 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-03-07 [patent_title] => 'Systems and methods for monitoring integrated circuit internal states' [patent_app_type] => utility [patent_app_number] => 09/984325 [patent_app_country] => US [patent_app_date] => 2001-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1521 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/009/07009416.pdf [firstpage_image] =>[orig_patent_app_number] => 09984325 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/984325
Systems and methods for monitoring integrated circuit internal states Oct 28, 2001 Issued
Array ( [id] => 5848528 [patent_doc_number] => 20020133750 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-09-19 [patent_title] => 'Integrated circuit having a test operating mode and method for testing a multiplicity of such circuits' [patent_app_type] => new [patent_app_number] => 10/033131 [patent_app_country] => US [patent_app_date] => 2001-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3394 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0133/20020133750.pdf [firstpage_image] =>[orig_patent_app_number] => 10033131 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/033131
Integrated circuit having a test operating mode and method for testing a multiplicity of such circuits Oct 21, 2001 Issued
Array ( [id] => 1207466 [patent_doc_number] => 06717425 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-04-06 [patent_title] => 'High-density PCB test jack' [patent_app_type] => B2 [patent_app_number] => 09/982430 [patent_app_country] => US [patent_app_date] => 2001-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 10 [patent_no_of_words] => 1631 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/717/06717425.pdf [firstpage_image] =>[orig_patent_app_number] => 09982430 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/982430
High-density PCB test jack Oct 16, 2001 Issued
Array ( [id] => 1176974 [patent_doc_number] => 06750668 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-06-15 [patent_title] => 'Vortex unit for providing a desired environment for a semiconductor process' [patent_app_type] => B1 [patent_app_number] => 09/981200 [patent_app_country] => US [patent_app_date] => 2001-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2489 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/750/06750668.pdf [firstpage_image] =>[orig_patent_app_number] => 09981200 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/981200
Vortex unit for providing a desired environment for a semiconductor process Oct 16, 2001 Issued
Array ( [id] => 6479877 [patent_doc_number] => 20020024356 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-02-28 [patent_title] => 'Method and apparatus for parallel die testing on wafer' [patent_app_type] => new [patent_app_number] => 09/982284 [patent_app_country] => US [patent_app_date] => 2001-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 9424 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 34 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0024/20020024356.pdf [firstpage_image] =>[orig_patent_app_number] => 09982284 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/982284
Method and apparatus for parallel die testing on wafer Oct 15, 2001 Abandoned
Array ( [id] => 1591531 [patent_doc_number] => 06483319 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-11-19 [patent_title] => 'Method of conducting broadband impedance response tests to predict stator winding failure' [patent_app_type] => B1 [patent_app_number] => 09/977753 [patent_app_country] => US [patent_app_date] => 2001-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 24 [patent_no_of_words] => 5623 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/483/06483319.pdf [firstpage_image] =>[orig_patent_app_number] => 09977753 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/977753
Method of conducting broadband impedance response tests to predict stator winding failure Oct 14, 2001 Issued
Array ( [id] => 1285453 [patent_doc_number] => 06642737 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-11-04 [patent_title] => 'METHOD OF GENERATING TRANSISTOR AC SCATTERING PARAMETERS SIMULTANEOUSLY WITH DC CHARACTERISTICS USING A SINGLE CIRCUIT SIMULATION WITH A SELF-CORRECTION SCHEME FOR THE ARTIFICIAL DC VOLTAGE DROPPED ACROSS THE 50-OHM RESISTOR REPRESENTING TRANSMISSION LINE IMPEDANCE' [patent_app_type] => B2 [patent_app_number] => 09/978929 [patent_app_country] => US [patent_app_date] => 2001-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 5 [patent_no_of_words] => 1879 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/642/06642737.pdf [firstpage_image] =>[orig_patent_app_number] => 09978929 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/978929
METHOD OF GENERATING TRANSISTOR AC SCATTERING PARAMETERS SIMULTANEOUSLY WITH DC CHARACTERISTICS USING A SINGLE CIRCUIT SIMULATION WITH A SELF-CORRECTION SCHEME FOR THE ARTIFICIAL DC VOLTAGE DROPPED ACROSS THE 50-OHM RESISTOR REPRESENTING TRANSMISSION LINE IMPEDANCE Oct 14, 2001 Issued
Array ( [id] => 1285282 [patent_doc_number] => 06642704 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-11-04 [patent_title] => 'Device for sensing electrical current and housing therefor' [patent_app_type] => B2 [patent_app_number] => 09/967426 [patent_app_country] => US [patent_app_date] => 2001-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 1187 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/642/06642704.pdf [firstpage_image] =>[orig_patent_app_number] => 09967426 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/967426
Device for sensing electrical current and housing therefor Sep 27, 2001 Issued
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