Ryan A. Dare

Array ( [id] => 16615830 [patent_doc_number] => 20210034483 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-04 [patent_title] => COMPUTER DUPLICATION AND CONFIGURATION MANAGEMENT SYSTEMS AND METHODS [patent_app_type] => utility [patent_app_number] => 16/900914 [patent_app_country] => US [patent_app_date] => 2020-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6407 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16900914 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17492277 [patent_doc_number] => 11281580 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-22 [patent_title] => Edge device triggering a write-ahead logging (WAL) log when abnormal condition occurs [patent_app_type] => utility [patent_app_number] => 16/896699 [patent_app_country] => US [patent_app_date] => 2020-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 5994 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16896699 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16730074 [patent_doc_number] => 20210097221 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-01 [patent_title] => OPTIMIZATION METHOD FOR GRAPH PROCESSING BASED ON HETEROGENEOUS FPGA DATA STREAMS [patent_app_type] => utility [patent_app_number] => 16/895545 [patent_app_country] => US [patent_app_date] => 2020-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9670 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 559 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16895545 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17245524 [patent_doc_number] => 20210365268 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-25 [patent_title] => OPERATIONAL CODE STORAGE FOR AN ON-DIE MICROPROCESSOR [patent_app_type] => utility [patent_app_number] => 16/878226 [patent_app_country] => US [patent_app_date] => 2020-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13970 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16878226 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17454656 [patent_doc_number] => 11269515 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-08 [patent_title] => Secure authentication for debugging data transferred over a system management bus [patent_app_type] => utility [patent_app_number] => 15/929659 [patent_app_country] => US [patent_app_date] => 2020-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 10347 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15929659 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17230590 [patent_doc_number] => 20210357147 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-18 [patent_title] => METHOD AND SYSTEM FOR FACILITATING MEMORY MEDIA AS A FILE STORAGE DEVICE BASED ON REAL-TIME HASHING [patent_app_type] => utility [patent_app_number] => 15/931067 [patent_app_country] => US [patent_app_date] => 2020-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7617 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15931067 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17230740 [patent_doc_number] => 20210357297 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-18 [patent_title] => REAL TIME DATABASE BACKUP STATUS INDICATION AND RESTORE [patent_app_type] => utility [patent_app_number] => 15/931291 [patent_app_country] => US [patent_app_date] => 2020-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8475 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15931291 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17230587 [patent_doc_number] => 20210357144 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-18 [patent_title] => SECURELY ARMING A MEMORY DEVICE FOR SELF-DESTRUCTION [patent_app_type] => utility [patent_app_number] => 15/930963 [patent_app_country] => US [patent_app_date] => 2020-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7390 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15930963 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17729580 [patent_doc_number] => 11385967 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-07-12 [patent_title] => Method for managing backup data by having space recycling operations on executed backup data blocks [patent_app_type] => utility [patent_app_number] => 15/930210 [patent_app_country] => US [patent_app_date] => 2020-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4644 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15930210 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17136367 [patent_doc_number] => 11137920 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-10-05 [patent_title] => Storing zones in a zone namespace on separate planes of a multi-plane memory device [patent_app_type] => utility [patent_app_number] => 15/929398 [patent_app_country] => US [patent_app_date] => 2020-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7710 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15929398 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17136385 [patent_doc_number] => 11137938 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-10-05 [patent_title] => Converting a multi-plane write operation into multiple single plane write operations performed in parallel on a multi-plane memory device [patent_app_type] => utility [patent_app_number] => 15/929399 [patent_app_country] => US [patent_app_date] => 2020-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 7741 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15929399 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16849085 [patent_doc_number] => 20210149830 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-20 [patent_title] => INLINE ENCRYPTION OF PACKET DATA [patent_app_type] => utility [patent_app_number] => 16/860983 [patent_app_country] => US [patent_app_date] => 2020-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12545 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16860983 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16844791 [patent_doc_number] => 11016880 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-05-25 [patent_title] => Data storage system with read disturb control strategy whereby disturb condition can be predicted [patent_app_type] => utility [patent_app_number] => 15/929358 [patent_app_country] => US [patent_app_date] => 2020-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 5891 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15929358 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16895071 [patent_doc_number] => 11036625 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-06-15 [patent_title] => Host-resident translation layer write command associated with logical block to physical address of a memory device [patent_app_type] => utility [patent_app_number] => 15/929320 [patent_app_country] => US [patent_app_date] => 2020-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7645 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15929320 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18477230 [patent_doc_number] => 11690955 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-04 [patent_title] => Continuous analyte sensor quality measures and related therapy actions for an automated therapy delivery system [patent_app_type] => utility [patent_app_number] => 16/856838 [patent_app_country] => US [patent_app_date] => 2020-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 20 [patent_no_of_words] => 22270 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16856838 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17183997 [patent_doc_number] => 20210330882 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-28 [patent_title] => INTUITIVE USER INTERFACE FEATURES AND RELATED FUNCTIONALITY FOR A THERAPY DELIVERY SYSTEM [patent_app_type] => utility [patent_app_number] => 16/856830 [patent_app_country] => US [patent_app_date] => 2020-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 22270 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 298 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16856830 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16584686 [patent_doc_number] => 20210019088 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-21 [patent_title] => UNMAP FOR COARSE MAPPING MEMORY SUB-SYSTEM [patent_app_type] => utility [patent_app_number] => 16/855470 [patent_app_country] => US [patent_app_date] => 2020-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9495 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16855470 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16667266 [patent_doc_number] => 10936513 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-02 [patent_title] => Apparatus and method for executing from a host side through a frontend interface input-output commands using a slot bit table [patent_app_type] => utility [patent_app_number] => 16/854065 [patent_app_country] => US [patent_app_date] => 2020-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 15 [patent_no_of_words] => 10215 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16854065 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17054312 [patent_doc_number] => 20210263746 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-08-26 [patent_title] => SELECTIVE BOOT CONTROLLER FOR RESILIENT STORAGE MEMORY [patent_app_type] => utility [patent_app_number] => 16/853204 [patent_app_country] => US [patent_app_date] => 2020-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9401 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16853204 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17172279 [patent_doc_number] => 20210325949 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-21 [patent_title] => DEVICE MAINTENANCE OF A DATA STORAGE DEVICE [patent_app_type] => utility [patent_app_number] => 16/849911 [patent_app_country] => US [patent_app_date] => 2020-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3998 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16849911 [rel_patent_id] =>[rel_patent_doc_number] =>)