Search

Ryan Bertram

Examiner (ID: 17330, Phone: (571)270-1377 , Office: P/2137 )

Most Active Art Unit
2137
Art Unit(s)
2187, 2137, 2112
Total Applications
950
Issued Applications
829
Pending Applications
44
Abandoned Applications
91

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20421709 [patent_doc_number] => 20250383794 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-12-18 [patent_title] => SHARED COMMAND BUS ARCHITECTURE FOR MEMORY SYSTEMS [patent_app_type] => utility [patent_app_number] => 19/221287 [patent_app_country] => US [patent_app_date] => 2025-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7181 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19221287 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/221287
SHARED COMMAND BUS ARCHITECTURE FOR MEMORY SYSTEMS May 27, 2025 Pending
Array ( [id] => 20208485 [patent_doc_number] => 20250278205 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-09-04 [patent_title] => DATA RESTORATION METHOD AND APPARATUS FOR STORAGE DEVICE [patent_app_type] => utility [patent_app_number] => 19/205697 [patent_app_country] => US [patent_app_date] => 2025-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19205697 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/205697
DATA RESTORATION METHOD AND APPARATUS FOR STORAGE DEVICE May 11, 2025 Pending
Array ( [id] => 20652984 [patent_doc_number] => 20260105003 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-04-16 [patent_title] => CACHING METHOD AND APPARATUS OF UNIVERSAL FLASH STORAGE [patent_app_type] => utility [patent_app_number] => 19/201576 [patent_app_country] => US [patent_app_date] => 2025-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2273 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19201576 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/201576
CACHING METHOD AND APPARATUS OF UNIVERSAL FLASH STORAGE May 6, 2025 Pending
Array ( [id] => 20152035 [patent_doc_number] => 20250251873 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-08-07 [patent_title] => MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 19/185755 [patent_app_country] => US [patent_app_date] => 2025-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13163 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19185755 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/185755
MEMORY SYSTEM Apr 21, 2025 Pending
Array ( [id] => 20087112 [patent_doc_number] => 20250217048 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-03 [patent_title] => STORAGE DEVICES INCLUDING NONVOLATILE MEMORY AND RELATED METHODS [patent_app_type] => utility [patent_app_number] => 19/086429 [patent_app_country] => US [patent_app_date] => 2025-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6658 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19086429 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/086429
STORAGE DEVICES INCLUDING NONVOLATILE MEMORY AND RELATED METHODS Mar 20, 2025 Pending
Array ( [id] => 20428346 [patent_doc_number] => 20250390438 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-12-25 [patent_title] => TWO ADDRESS TRANSLATIONS FROM A SINGLE TABLE LOOK-ASIDE BUFFER READ [patent_app_type] => utility [patent_app_number] => 19/060858 [patent_app_country] => US [patent_app_date] => 2025-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14367 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19060858 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/060858
TWO ADDRESS TRANSLATIONS FROM A SINGLE TABLE LOOK-ASIDE BUFFER READ Feb 23, 2025 Pending
Array ( [id] => 20043290 [patent_doc_number] => 20250181512 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-05 [patent_title] => BANDWIDTH BOOSTED STACKED MEMORY [patent_app_type] => utility [patent_app_number] => 19/052063 [patent_app_country] => US [patent_app_date] => 2025-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1102 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 15 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19052063 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/052063
BANDWIDTH BOOSTED STACKED MEMORY Feb 11, 2025 Pending
Array ( [id] => 20281548 [patent_doc_number] => 20250306790 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-02 [patent_title] => Co-located Journaling and Data Storage for Write Requests [patent_app_type] => utility [patent_app_number] => 19/049688 [patent_app_country] => US [patent_app_date] => 2025-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7174 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19049688 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/049688
Co-located Journaling and Data Storage for Write Requests Feb 9, 2025 Pending
Array ( [id] => 20446818 [patent_doc_number] => 20260003540 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-01-01 [patent_title] => STORAGE CONTROLLER AND STORAGE DEVICE INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 19/048045 [patent_app_country] => US [patent_app_date] => 2025-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12697 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19048045 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/048045
STORAGE CONTROLLER AND STORAGE DEVICE INCLUDING THE SAME Feb 6, 2025 Pending
Array ( [id] => 20101764 [patent_doc_number] => 20250231700 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-17 [patent_title] => PERFORMANCE CONTROL FOR A MEMORY SUB-SYSTEM [patent_app_type] => utility [patent_app_number] => 19/025830 [patent_app_country] => US [patent_app_date] => 2025-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3529 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19025830 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/025830
PERFORMANCE CONTROL FOR A MEMORY SUB-SYSTEM Jan 15, 2025 Pending
Array ( [id] => 20811848 [patent_doc_number] => 20260186673 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-07-02 [patent_title] => METHODS AND SYSTEMS FOR MEMORY BELT ARCHITECTURE MANAGEMENT [patent_app_type] => utility [patent_app_number] => 19/005901 [patent_app_country] => US [patent_app_date] => 2024-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19005901 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/005901
METHODS AND SYSTEMS FOR MEMORY BELT ARCHITECTURE MANAGEMENT Dec 29, 2024 Pending
Array ( [id] => 20666537 [patent_doc_number] => 12608312 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-04-21 [patent_title] => Data access control method of memory card and computer system [patent_app_type] => utility [patent_app_number] => 19/002788 [patent_app_country] => US [patent_app_date] => 2024-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 1144 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19002788 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/002788
Data access control method of memory card and computer system Dec 26, 2024 Issued
Array ( [id] => 20087339 [patent_doc_number] => 20250217275 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-03 [patent_title] => CONTROL DEVICE [patent_app_type] => utility [patent_app_number] => 19/002601 [patent_app_country] => US [patent_app_date] => 2024-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7061 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19002601 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/002601
CONTROL DEVICE Dec 25, 2024 Pending
Array ( [id] => 20124276 [patent_doc_number] => 20250239307 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-24 [patent_title] => PARTIAL-FINE PROGRAM SCHEME FOR RELIABILITY RISK WORD LINES [patent_app_type] => utility [patent_app_number] => 18/985910 [patent_app_country] => US [patent_app_date] => 2024-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11319 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18985910 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/985910
PARTIAL-FINE PROGRAM SCHEME FOR RELIABILITY RISK WORD LINES Dec 17, 2024 Pending
Array ( [id] => 20781723 [patent_doc_number] => 20260169919 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-06-18 [patent_title] => PROGRESSIVE CLUTCH CACHE ARCHITECTURE [patent_app_type] => utility [patent_app_number] => 18/986589 [patent_app_country] => US [patent_app_date] => 2024-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20237 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18986589 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/986589
PROGRESSIVE CLUTCH CACHE ARCHITECTURE Dec 17, 2024 Pending
Array ( [id] => 20570661 [patent_doc_number] => 20260064586 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-03-05 [patent_title] => MEMORY SYSTEM AND CONTROL METHOD [patent_app_type] => utility [patent_app_number] => 18/980914 [patent_app_country] => US [patent_app_date] => 2024-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4696 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18980914 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/980914
MEMORY SYSTEM AND CONTROL METHOD Dec 12, 2024 Pending
Array ( [id] => 20764326 [patent_doc_number] => 20260161309 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-06-11 [patent_title] => SELF-ADAPTIVE POWER ADJUSTMENT FOR NVME DRIVES [patent_app_type] => utility [patent_app_number] => 18/974542 [patent_app_country] => US [patent_app_date] => 2024-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2480 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18974542 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/974542
SELF-ADAPTIVE POWER ADJUSTMENT FOR NVME DRIVES Dec 8, 2024 Pending
Array ( [id] => 20758023 [patent_doc_number] => 12650792 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-06-09 [patent_title] => Data read-write method and system, and device and storage medium [patent_app_type] => utility [patent_app_number] => 19/470776 [patent_app_country] => US [patent_app_date] => 2024-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 14752 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 370 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19470776 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/470776
Data read-write method and system, and device and storage medium Dec 2, 2024 Issued
Array ( [id] => 20035086 [patent_doc_number] => 20250173308 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-29 [patent_title] => GRAPHICS PROCESSOR DATA ACCESS AND SHARING [patent_app_type] => utility [patent_app_number] => 18/958930 [patent_app_country] => US [patent_app_date] => 2024-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 37234 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18958930 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/958930
GRAPHICS PROCESSOR DATA ACCESS AND SHARING Nov 24, 2024 Pending
Array ( [id] => 20087119 [patent_doc_number] => 20250217055 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-03 [patent_title] => SOLID STATE DRIVE, INFORMATION PROCESSING APPARATUS, AND CONTROL METHOD [patent_app_type] => utility [patent_app_number] => 18/936526 [patent_app_country] => US [patent_app_date] => 2024-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3320 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18936526 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/936526
SOLID STATE DRIVE, INFORMATION PROCESSING APPARATUS, AND CONTROL METHOD Nov 3, 2024 Pending
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