Search

Ryan Bertram

Examiner (ID: 14025, Phone: (571)270-1377 , Office: P/2137 )

Most Active Art Unit
2137
Art Unit(s)
2137, 2112, 2187
Total Applications
948
Issued Applications
826
Pending Applications
45
Abandoned Applications
91

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11013119 [patent_doc_number] => 20160210072 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-07-21 [patent_title] => 'CONTROLLER AND MEMORY SYSTEM' [patent_app_type] => utility [patent_app_number] => 14/796250 [patent_app_country] => US [patent_app_date] => 2015-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 11765 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14796250 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/796250
CONTROLLER AND MEMORY SYSTEM Jul 9, 2015 Abandoned
Array ( [id] => 11775204 [patent_doc_number] => 09384134 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-07-05 [patent_title] => 'Persistent memory for processor main memory' [patent_app_type] => utility [patent_app_number] => 14/791030 [patent_app_country] => US [patent_app_date] => 2015-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3841 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14791030 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/791030
Persistent memory for processor main memory Jul 1, 2015 Issued
Array ( [id] => 11846499 [patent_doc_number] => 09734053 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-08-15 [patent_title] => 'Garbage collection handler to update object pointers' [patent_app_type] => utility [patent_app_number] => 14/755679 [patent_app_country] => US [patent_app_date] => 2015-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 10328 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14755679 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/755679
Garbage collection handler to update object pointers Jun 29, 2015 Issued
Array ( [id] => 10991533 [patent_doc_number] => 20160188478 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-30 [patent_title] => 'MANAGING METADATA FOR CACHING DEVICES DURING SHUTDOWN AND RESTART PROCEDURES' [patent_app_type] => utility [patent_app_number] => 14/750971 [patent_app_country] => US [patent_app_date] => 2015-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5206 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14750971 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/750971
MANAGING METADATA FOR CACHING DEVICES DURING SHUTDOWN AND RESTART PROCEDURES Jun 24, 2015 Abandoned
Array ( [id] => 11889933 [patent_doc_number] => 09760494 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-09-12 [patent_title] => 'Hybrid tracking of transaction read and write sets' [patent_app_type] => utility [patent_app_number] => 14/748381 [patent_app_country] => US [patent_app_date] => 2015-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 20712 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14748381 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/748381
Hybrid tracking of transaction read and write sets Jun 23, 2015 Issued
Array ( [id] => 11338217 [patent_doc_number] => 20160363972 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-15 [patent_title] => 'TEMPERATURE CONTROL OF STORAGE ARRAYS WITH ROTATING MEDIA SEEK ADJUSTMENTS' [patent_app_type] => utility [patent_app_number] => 14/738568 [patent_app_country] => US [patent_app_date] => 2015-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7886 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14738568 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/738568
TEMPERATURE CONTROL OF STORAGE ARRAYS WITH ROTATING MEDIA SEEK ADJUSTMENTS Jun 11, 2015 Abandoned
Array ( [id] => 10383854 [patent_doc_number] => 20150268861 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-09-24 [patent_title] => 'SCHEDULING REQUESTS IN A SOLID STATE MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 14/728594 [patent_app_country] => US [patent_app_date] => 2015-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 8693 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14728594 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/728594
Scheduling requests in a solid state memory device Jun 1, 2015 Issued
Array ( [id] => 11313901 [patent_doc_number] => 20160350010 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-01 [patent_title] => 'PROVIDING BLOCK SIZE COMPATIBILITY WITH A STORAGE FILTER' [patent_app_type] => utility [patent_app_number] => 14/726598 [patent_app_country] => US [patent_app_date] => 2015-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 11901 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14726598 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/726598
PROVIDING BLOCK SIZE COMPATIBILITY WITH A STORAGE FILTER May 30, 2015 Abandoned
Array ( [id] => 10376677 [patent_doc_number] => 20150261684 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-09-17 [patent_title] => 'MEMORY MANAGEMENT WITH PRIORITY-BASED MEMORY RECLAMATION' [patent_app_type] => utility [patent_app_number] => 14/726092 [patent_app_country] => US [patent_app_date] => 2015-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 10966 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14726092 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/726092
Memory management with priority-based memory reclamation May 28, 2015 Issued
Array ( [id] => 13807363 [patent_doc_number] => 10180948 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-01-15 [patent_title] => Data storage with a distributed virtual array [patent_app_type] => utility [patent_app_number] => 14/710541 [patent_app_country] => US [patent_app_date] => 2015-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5840 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 253 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14710541 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/710541
Data storage with a distributed virtual array May 11, 2015 Issued
Array ( [id] => 11131198 [patent_doc_number] => 20160328172 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-11-10 [patent_title] => 'APPARATUS AND METHOD FOR EFFICIENT MEMORY RENAMING PREDICTION USING VIRTUAL REGISTERS' [patent_app_type] => utility [patent_app_number] => 14/706936 [patent_app_country] => US [patent_app_date] => 2015-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 7947 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14706936 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/706936
Apparatus and method for efficient memory renaming prediction using virtual registers May 6, 2015 Issued
Array ( [id] => 11049719 [patent_doc_number] => 20160246678 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-08-25 [patent_title] => 'RAID ARRAY SYSTEMS AND OPERATIONS USING MAPPING INFORMATION' [patent_app_type] => utility [patent_app_number] => 14/687412 [patent_app_country] => US [patent_app_date] => 2015-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 18596 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14687412 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/687412
Raid array systems and operations using mapping information Apr 14, 2015 Issued
Array ( [id] => 11724267 [patent_doc_number] => 09697122 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-07-04 [patent_title] => 'Data processing device' [patent_app_type] => utility [patent_app_number] => 14/643375 [patent_app_country] => US [patent_app_date] => 2015-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 30 [patent_no_of_words] => 8435 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 311 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14643375 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/643375
Data processing device Mar 9, 2015 Issued
Array ( [id] => 11752377 [patent_doc_number] => 09710389 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-07-18 [patent_title] => 'Method and apparatus for memory aliasing detection in an out-of-order instruction execution platform' [patent_app_type] => utility [patent_app_number] => 14/643354 [patent_app_country] => US [patent_app_date] => 2015-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 7049 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14643354 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/643354
Method and apparatus for memory aliasing detection in an out-of-order instruction execution platform Mar 9, 2015 Issued
Array ( [id] => 12146359 [patent_doc_number] => 09880612 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-01-30 [patent_title] => 'Execution control method and execution control apparatus' [patent_app_type] => utility [patent_app_number] => 14/643471 [patent_app_country] => US [patent_app_date] => 2015-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 17 [patent_no_of_words] => 10739 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14643471 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/643471
Execution control method and execution control apparatus Mar 9, 2015 Issued
Array ( [id] => 11846457 [patent_doc_number] => 09734011 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-08-15 [patent_title] => 'Two-terminal memory set features type mechanisms enhancements' [patent_app_type] => utility [patent_app_number] => 14/641878 [patent_app_country] => US [patent_app_date] => 2015-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 18513 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14641878 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/641878
Two-terminal memory set features type mechanisms enhancements Mar 8, 2015 Issued
Array ( [id] => 11830516 [patent_doc_number] => 09727258 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-08-08 [patent_title] => 'Two-terminal memory compatibility with NAND flash memory set features type mechanisms' [patent_app_type] => utility [patent_app_number] => 14/642205 [patent_app_country] => US [patent_app_date] => 2015-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 18401 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14642205 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/642205
Two-terminal memory compatibility with NAND flash memory set features type mechanisms Mar 8, 2015 Issued
Array ( [id] => 10569046 [patent_doc_number] => 09292214 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-03-22 [patent_title] => 'Systems and methods for migrating data' [patent_app_type] => utility [patent_app_number] => 14/636799 [patent_app_country] => US [patent_app_date] => 2015-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 8741 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14636799 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/636799
Systems and methods for migrating data Mar 2, 2015 Issued
Array ( [id] => 11049559 [patent_doc_number] => 20160246518 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-08-25 [patent_title] => 'RAID ARRAY SYSTEMS AND OPERATIONS USING MAPPING INFORMATION' [patent_app_type] => utility [patent_app_number] => 14/627401 [patent_app_country] => US [patent_app_date] => 2015-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 18549 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14627401 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/627401
RAID array systems and operations using mapping information Feb 19, 2015 Issued
Array ( [id] => 11049772 [patent_doc_number] => 20160246731 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-08-25 [patent_title] => 'SELECTIVE TRANSLATION LOOKASIDE BUFFER SEARCH AND PAGE FAULT' [patent_app_type] => utility [patent_app_number] => 14/626925 [patent_app_country] => US [patent_app_date] => 2015-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7779 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14626925 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/626925
Selective translation lookaside buffer search and page fault Feb 19, 2015 Issued
Menu