Search

Ryan Bertram

Examiner (ID: 14025, Phone: (571)270-1377 , Office: P/2137 )

Most Active Art Unit
2137
Art Unit(s)
2137, 2112, 2187
Total Applications
948
Issued Applications
826
Pending Applications
45
Abandoned Applications
91

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5454611 [patent_doc_number] => 20090070648 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-03-12 [patent_title] => 'Efficient Scheduling of Background Scrub Commands' [patent_app_type] => utility [patent_app_number] => 11/851487 [patent_app_country] => US [patent_app_date] => 2007-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7083 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0070/20090070648.pdf [firstpage_image] =>[orig_patent_app_number] => 11851487 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/851487
Efficient scheduling of background scrub commands Sep 6, 2007 Issued
Array ( [id] => 8235451 [patent_doc_number] => 08200912 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-06-12 [patent_title] => 'Multi-core device with optimized memory configuration' [patent_app_type] => utility [patent_app_number] => 12/439508 [patent_app_country] => US [patent_app_date] => 2007-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 4819 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/200/08200912.pdf [firstpage_image] =>[orig_patent_app_number] => 12439508 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/439508
Multi-core device with optimized memory configuration Aug 27, 2007 Issued
Array ( [id] => 4671583 [patent_doc_number] => 20080046644 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-02-21 [patent_title] => 'Method and System to Provide a Redundant Buffer Cache for Block Based Storage Servers' [patent_app_type] => utility [patent_app_number] => 11/838156 [patent_app_country] => US [patent_app_date] => 2007-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3002 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0046/20080046644.pdf [firstpage_image] =>[orig_patent_app_number] => 11838156 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/838156
Method and System to Provide a Redundant Buffer Cache for Block Based Storage Servers Aug 12, 2007 Abandoned
Array ( [id] => 5448030 [patent_doc_number] => 20090049256 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-02-19 [patent_title] => 'MEMORY CONTROLLER PRIORITIZATION SCHEME' [patent_app_type] => utility [patent_app_number] => 11/837943 [patent_app_country] => US [patent_app_date] => 2007-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4011 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0049/20090049256.pdf [firstpage_image] =>[orig_patent_app_number] => 11837943 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/837943
Memory controller prioritization scheme Aug 12, 2007 Issued
Array ( [id] => 4671424 [patent_doc_number] => 20080046485 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-02-21 [patent_title] => 'Method and System for Disaster Recovery of Servers with Optimized Positioning of Backups on Volumes' [patent_app_type] => utility [patent_app_number] => 11/838049 [patent_app_country] => US [patent_app_date] => 2007-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4028 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0046/20080046485.pdf [firstpage_image] =>[orig_patent_app_number] => 11838049 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/838049
Method and System for Disaster Recovery of Servers with Optimized Positioning of Backups on Volumes Aug 12, 2007 Abandoned
Array ( [id] => 4602793 [patent_doc_number] => 07979636 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-07-12 [patent_title] => 'Method of controlling semiconductor memory card system' [patent_app_type] => utility [patent_app_number] => 11/837872 [patent_app_country] => US [patent_app_date] => 2007-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 7083 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/979/07979636.pdf [firstpage_image] =>[orig_patent_app_number] => 11837872 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/837872
Method of controlling semiconductor memory card system Aug 12, 2007 Issued
Array ( [id] => 4659262 [patent_doc_number] => 20080028124 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-01-31 [patent_title] => 'Virtual machine system and operating method thereof' [patent_app_type] => utility [patent_app_number] => 11/878576 [patent_app_country] => US [patent_app_date] => 2007-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 6238 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0028/20080028124.pdf [firstpage_image] =>[orig_patent_app_number] => 11878576 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/878576
Virtual machine system and operating method thereof Jul 24, 2007 Issued
Array ( [id] => 5523091 [patent_doc_number] => 20090031072 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-29 [patent_title] => 'Hybrid nonvolatile RAM' [patent_app_type] => utility [patent_app_number] => 11/881346 [patent_app_country] => US [patent_app_date] => 2007-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 8422 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0031/20090031072.pdf [firstpage_image] =>[orig_patent_app_number] => 11881346 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/881346
Hybrid nonvolatile ram Jul 24, 2007 Issued
Array ( [id] => 7529940 [patent_doc_number] => 08046546 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-10-25 [patent_title] => 'Variable partitioning in a hybrid memory subsystem' [patent_app_type] => utility [patent_app_number] => 11/881248 [patent_app_country] => US [patent_app_date] => 2007-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 15 [patent_no_of_words] => 8422 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/046/08046546.pdf [firstpage_image] =>[orig_patent_app_number] => 11881248 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/881248
Variable partitioning in a hybrid memory subsystem Jul 24, 2007 Issued
Array ( [id] => 4735477 [patent_doc_number] => 20080052459 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-02-28 [patent_title] => 'Redundant array of independent disks system' [patent_app_type] => utility [patent_app_number] => 11/878563 [patent_app_country] => US [patent_app_date] => 2007-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2077 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0052/20080052459.pdf [firstpage_image] =>[orig_patent_app_number] => 11878563 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/878563
Redundant array of independent disks system Jul 24, 2007 Abandoned
Array ( [id] => 4448927 [patent_doc_number] => 07865679 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-01-04 [patent_title] => 'Power interrupt recovery in a hybrid memory subsystem' [patent_app_type] => utility [patent_app_number] => 11/881361 [patent_app_country] => US [patent_app_date] => 2007-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 15 [patent_no_of_words] => 8422 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/865/07865679.pdf [firstpage_image] =>[orig_patent_app_number] => 11881361 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/881361
Power interrupt recovery in a hybrid memory subsystem Jul 24, 2007 Issued
Array ( [id] => 9289287 [patent_doc_number] => 08645643 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-02-04 [patent_title] => 'Data processing control unit for controlling multiple data processing operations' [patent_app_type] => utility [patent_app_number] => 12/595362 [patent_app_country] => US [patent_app_date] => 2007-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 7042 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12595362 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/595362
Data processing control unit for controlling multiple data processing operations Apr 17, 2007 Issued
Array ( [id] => 97232 [patent_doc_number] => 07739477 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-06-15 [patent_title] => 'Multiple page size address translation incorporating page size prediction' [patent_app_type] => utility [patent_app_number] => 11/733520 [patent_app_country] => US [patent_app_date] => 2007-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 7311 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/739/07739477.pdf [firstpage_image] =>[orig_patent_app_number] => 11733520 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/733520
Multiple page size address translation incorporating page size prediction Apr 9, 2007 Issued
Array ( [id] => 4683982 [patent_doc_number] => 20080250208 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-09 [patent_title] => 'System and Method for Improving the Page Crossing Performance of a Data Prefetcher' [patent_app_type] => utility [patent_app_number] => 11/697493 [patent_app_country] => US [patent_app_date] => 2007-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6705 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0250/20080250208.pdf [firstpage_image] =>[orig_patent_app_number] => 11697493 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/697493
System and method for improving the page crossing performance of a data prefetcher Apr 5, 2007 Issued
Array ( [id] => 58091 [patent_doc_number] => 07774566 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-08-10 [patent_title] => 'Physical tape interchange format' [patent_app_type] => utility [patent_app_number] => 11/697004 [patent_app_country] => US [patent_app_date] => 2007-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4062 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/774/07774566.pdf [firstpage_image] =>[orig_patent_app_number] => 11697004 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/697004
Physical tape interchange format Apr 4, 2007 Issued
Array ( [id] => 5209371 [patent_doc_number] => 20070247955 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-25 [patent_title] => 'METHOD FOR INITIALIZING A MEMORY' [patent_app_type] => utility [patent_app_number] => 11/696863 [patent_app_country] => US [patent_app_date] => 2007-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5592 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0247/20070247955.pdf [firstpage_image] =>[orig_patent_app_number] => 11696863 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/696863
Method for initializing a memory Apr 4, 2007 Issued
Array ( [id] => 106823 [patent_doc_number] => 07730273 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-06-01 [patent_title] => 'Method for securing data blocks in an electrically programmable memory' [patent_app_type] => utility [patent_app_number] => 11/784210 [patent_app_country] => US [patent_app_date] => 2007-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 4848 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/730/07730273.pdf [firstpage_image] =>[orig_patent_app_number] => 11784210 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/784210
Method for securing data blocks in an electrically programmable memory Apr 3, 2007 Issued
Array ( [id] => 5226623 [patent_doc_number] => 20070255890 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-11-01 [patent_title] => 'Flash memory apparatus and access method to flash memory' [patent_app_type] => utility [patent_app_number] => 11/732658 [patent_app_country] => US [patent_app_date] => 2007-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5812 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0255/20070255890.pdf [firstpage_image] =>[orig_patent_app_number] => 11732658 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/732658
Flash memory apparatus and access method to flash memory Apr 3, 2007 Issued
Array ( [id] => 7557416 [patent_doc_number] => 08069325 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-11-29 [patent_title] => 'Region protection unit, instruction set and method for protecting a memory region' [patent_app_type] => utility [patent_app_number] => 12/161278 [patent_app_country] => US [patent_app_date] => 2007-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 6254 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/069/08069325.pdf [firstpage_image] =>[orig_patent_app_number] => 12161278 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/161278
Region protection unit, instruction set and method for protecting a memory region Jan 15, 2007 Issued
Array ( [id] => 28219 [patent_doc_number] => 07797511 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-09-14 [patent_title] => 'Memory refresh system and method' [patent_app_type] => utility [patent_app_number] => 11/650120 [patent_app_country] => US [patent_app_date] => 2007-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1475 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/797/07797511.pdf [firstpage_image] =>[orig_patent_app_number] => 11650120 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/650120
Memory refresh system and method Jan 4, 2007 Issued
Menu