Search

Ryan Bertram

Examiner (ID: 14025, Phone: (571)270-1377 , Office: P/2137 )

Most Active Art Unit
2137
Art Unit(s)
2137, 2112, 2187
Total Applications
948
Issued Applications
826
Pending Applications
45
Abandoned Applications
91

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19303048 [patent_doc_number] => 20240231627 [patent_country] => US [patent_kind] => A9 [patent_issue_date] => 2024-07-11 [patent_title] => AVOIDING RAID ARRAY OVERDRIVE USING NONVOLATILE MEMORY IN CACHE [patent_app_type] => utility [patent_app_number] => 17/971109 [patent_app_country] => US [patent_app_date] => 2022-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9967 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17971109 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/971109
AVOIDING RAID ARRAY OVERDRIVE USING NONVOLATILE MEMORY IN CACHE Oct 19, 2022 Pending
Array ( [id] => 19129190 [patent_doc_number] => 20240134543 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-25 [patent_title] => MICROSERVICE STORAGE DEVICE SYSTEM [patent_app_type] => utility [patent_app_number] => 17/969874 [patent_app_country] => US [patent_app_date] => 2022-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18449 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17969874 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/969874
Microservice storage device system Oct 19, 2022 Issued
Array ( [id] => 19259487 [patent_doc_number] => 12019541 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-25 [patent_title] => Lazy compaction in garbage collection [patent_app_type] => utility [patent_app_number] => 17/967214 [patent_app_country] => US [patent_app_date] => 2022-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 16832 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17967214 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/967214
Lazy compaction in garbage collection Oct 16, 2022 Issued
Array ( [id] => 19703698 [patent_doc_number] => 12197733 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-14 [patent_title] => Memory system refresh management [patent_app_type] => utility [patent_app_number] => 17/965957 [patent_app_country] => US [patent_app_date] => 2022-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 7979 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17965957 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/965957
Memory system refresh management Oct 13, 2022 Issued
Array ( [id] => 18393484 [patent_doc_number] => 20230161704 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-25 [patent_title] => COMPUTING SYSTEM WITH DIRECT INVALIDATION IN A HIERARCHICAL CACHE STRUCTURE BASED ON AT LEAST ONE DESIGNATED KEY IDENTIFICATION CODE [patent_app_type] => utility [patent_app_number] => 18/046625 [patent_app_country] => US [patent_app_date] => 2022-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13151 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -32 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18046625 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/046625
Computing system with direct invalidation in a hierarchical cache structure based on at least one designated key identification code Oct 13, 2022 Issued
Array ( [id] => 19458958 [patent_doc_number] => 12099447 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-24 [patent_title] => Setting cache policy information for prefetched cache entry [patent_app_type] => utility [patent_app_number] => 17/965173 [patent_app_country] => US [patent_app_date] => 2022-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 11638 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 228 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17965173 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/965173
Setting cache policy information for prefetched cache entry Oct 12, 2022 Issued
Array ( [id] => 19327797 [patent_doc_number] => 12045484 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-23 [patent_title] => Data placement selection among storage devices associated with storage nodes of a storage system [patent_app_type] => utility [patent_app_number] => 17/964138 [patent_app_country] => US [patent_app_date] => 2022-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 10609 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 365 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17964138 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/964138
Data placement selection among storage devices associated with storage nodes of a storage system Oct 11, 2022 Issued
Array ( [id] => 19197747 [patent_doc_number] => 11994985 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-28 [patent_title] => Method and apparatus for performing access management of memory device in host performance booster architecture with aid of device side table information encoding and decoding [patent_app_type] => utility [patent_app_number] => 17/959320 [patent_app_country] => US [patent_app_date] => 2022-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 13731 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 645 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17959320 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/959320
Method and apparatus for performing access management of memory device in host performance booster architecture with aid of device side table information encoding and decoding Oct 3, 2022 Issued
Array ( [id] => 19198111 [patent_doc_number] => 11995349 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-28 [patent_title] => Method and apparatus for performing access management of memory device in host performance booster architecture with aid of device side table information encoding and decoding [patent_app_type] => utility [patent_app_number] => 17/959308 [patent_app_country] => US [patent_app_date] => 2022-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 13531 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 639 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17959308 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/959308
Method and apparatus for performing access management of memory device in host performance booster architecture with aid of device side table information encoding and decoding Oct 3, 2022 Issued
Array ( [id] => 19084879 [patent_doc_number] => 20240111680 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-04 [patent_title] => Selecting Between Basic and Global Persistent Flush Modes [patent_app_type] => utility [patent_app_number] => 17/957205 [patent_app_country] => US [patent_app_date] => 2022-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11070 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17957205 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/957205
Selecting between basic and global persistent flush modes Sep 29, 2022 Issued
Array ( [id] => 19313035 [patent_doc_number] => 12038847 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-16 [patent_title] => A/D bit storage, processing, and modes [patent_app_type] => utility [patent_app_number] => 17/952933 [patent_app_country] => US [patent_app_date] => 2022-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5505 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 41 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17952933 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/952933
A/D bit storage, processing, and modes Sep 25, 2022 Issued
Array ( [id] => 18439674 [patent_doc_number] => 20230186969 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-15 [patent_title] => MEMORY DEVICE THAT STORES NUMBER OF ACTIVATION TIMES OF WORD LINES [patent_app_type] => utility [patent_app_number] => 17/953068 [patent_app_country] => US [patent_app_date] => 2022-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8641 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17953068 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/953068
Memory device that stores number of activation times of word lines Sep 25, 2022 Issued
Array ( [id] => 18095430 [patent_doc_number] => 20220413771 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-29 [patent_title] => CACHE PROGRAM OPERATION OF THREE-DIMENSIONAL MEMORY DEVICE WITH STATIC RANDOM-ACCESS MEMORY [patent_app_type] => utility [patent_app_number] => 17/939333 [patent_app_country] => US [patent_app_date] => 2022-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16416 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17939333 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/939333
Cache program operation of three-dimensional memory device with static random-access memory Sep 6, 2022 Issued
Array ( [id] => 19028978 [patent_doc_number] => 11928336 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-12 [patent_title] => Systems and methods for heterogeneous storage systems [patent_app_type] => utility [patent_app_number] => 17/900830 [patent_app_country] => US [patent_app_date] => 2022-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8836 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17900830 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/900830
Systems and methods for heterogeneous storage systems Aug 30, 2022 Issued
Array ( [id] => 19212639 [patent_doc_number] => 12001702 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-04 [patent_title] => Memory system and method to configure logical blocks [patent_app_type] => utility [patent_app_number] => 17/879880 [patent_app_country] => US [patent_app_date] => 2022-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 18 [patent_no_of_words] => 7093 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17879880 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/879880
Memory system and method to configure logical blocks Aug 2, 2022 Issued
Array ( [id] => 18889479 [patent_doc_number] => 11868249 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-09 [patent_title] => Method and apparatus for reducing operation of garbage collection [patent_app_type] => utility [patent_app_number] => 17/880104 [patent_app_country] => US [patent_app_date] => 2022-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 14379 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17880104 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/880104
Method and apparatus for reducing operation of garbage collection Aug 2, 2022 Issued
Array ( [id] => 18228045 [patent_doc_number] => 20230067039 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-02 [patent_title] => INFORMATION PROCESSING APPARATUS, INFORMATION PROCESSING METHOD, AND INFORMATION PROCESSING PROGRAM [patent_app_type] => utility [patent_app_number] => 17/815945 [patent_app_country] => US [patent_app_date] => 2022-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4154 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17815945 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/815945
INFORMATION PROCESSING APPARATUS, INFORMATION PROCESSING METHOD, AND INFORMATION PROCESSING PROGRAM Jul 28, 2022 Abandoned
Array ( [id] => 18703120 [patent_doc_number] => 11789630 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-17 [patent_title] => Identified zones for optimal parity sharing zones [patent_app_type] => utility [patent_app_number] => 17/877554 [patent_app_country] => US [patent_app_date] => 2022-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 19 [patent_no_of_words] => 10340 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17877554 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/877554
Identified zones for optimal parity sharing zones Jul 28, 2022 Issued
Array ( [id] => 17991836 [patent_doc_number] => 20220357873 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-10 [patent_title] => IMPLEMENTING FAULT TOLERANT PAGE STRIPES ON LOW DENSITY MEMORY SYSTEMS [patent_app_type] => utility [patent_app_number] => 17/872206 [patent_app_country] => US [patent_app_date] => 2022-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7372 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17872206 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/872206
Implementing fault tolerant page stripes on low density memory systems Jul 24, 2022 Issued
Array ( [id] => 19028974 [patent_doc_number] => 11928332 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-12 [patent_title] => Namespace size adjustment in non-volatile memory devices [patent_app_type] => utility [patent_app_number] => 17/870642 [patent_app_country] => US [patent_app_date] => 2022-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 20 [patent_no_of_words] => 14239 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17870642 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/870642
Namespace size adjustment in non-volatile memory devices Jul 20, 2022 Issued
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