Search

Ryan C. Jager

Examiner (ID: 2114, Phone: (571)272-7016 , Office: P/2842 )

Most Active Art Unit
2842
Art Unit(s)
2816, 2842, 2836
Total Applications
1406
Issued Applications
1239
Pending Applications
68
Abandoned Applications
123

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20776373 [patent_doc_number] => 12660065 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-06-16 [patent_title] => Current-limiting circuit for LED power supply [patent_app_type] => utility [patent_app_number] => 19/456932 [patent_app_country] => US [patent_app_date] => 2026-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 2320 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19456932 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/456932
Current-limiting circuit for LED power supply Jan 21, 2026 Issued
Array ( [id] => 20382485 [patent_doc_number] => 20250364978 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-11-27 [patent_title] => CLOCK CIRCUIT [patent_app_type] => utility [patent_app_number] => 19/208964 [patent_app_country] => US [patent_app_date] => 2025-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19208964 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/208964
CLOCK CIRCUIT May 14, 2025 Pending
Array ( [id] => 20284642 [patent_doc_number] => 20250309884 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-02 [patent_title] => SWITCH DEVICE, LOAD DRIVE SYSTEM, AND SWITCH SYSTEM [patent_app_type] => utility [patent_app_number] => 19/090563 [patent_app_country] => US [patent_app_date] => 2025-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11111 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 236 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19090563 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/090563
SWITCH DEVICE, LOAD DRIVE SYSTEM, AND SWITCH SYSTEM Mar 25, 2025 Pending
Array ( [id] => 20236359 [patent_doc_number] => 20250293678 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-09-18 [patent_title] => CIRCUIT WITH A LATCH HAVING SETS OF INVERTERS [patent_app_type] => utility [patent_app_number] => 19/071028 [patent_app_country] => US [patent_app_date] => 2025-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19071028 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/071028
CIRCUIT WITH A LATCH HAVING SETS OF INVERTERS Mar 4, 2025 Pending
Array ( [id] => 20223532 [patent_doc_number] => 20250286463 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-09-11 [patent_title] => GATE DRIVER CIRCUIT [patent_app_type] => utility [patent_app_number] => 19/068163 [patent_app_country] => US [patent_app_date] => 2025-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3120 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19068163 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/068163
GATE DRIVER CIRCUIT Mar 2, 2025 Pending
Array ( [id] => 20064258 [patent_doc_number] => 20250202480 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-19 [patent_title] => METHODS AND APPARATUS TO CONVERT ANALOG VOLTAGES TO DELAY SIGNALS [patent_app_type] => utility [patent_app_number] => 19/066630 [patent_app_country] => US [patent_app_date] => 2025-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7807 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 248 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19066630 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/066630
METHODS AND APPARATUS TO CONVERT ANALOG VOLTAGES TO DELAY SIGNALS Feb 27, 2025 Pending
Array ( [id] => 20236361 [patent_doc_number] => 20250293680 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-09-18 [patent_title] => CIRCUIT, SYSTEM AND METHOD RELATED TO A DUAL GATE TRANSISTOR ARRANGEMENT [patent_app_type] => utility [patent_app_number] => 19/064163 [patent_app_country] => US [patent_app_date] => 2025-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1104 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19064163 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/064163
CIRCUIT, SYSTEM AND METHOD RELATED TO A DUAL GATE TRANSISTOR ARRANGEMENT Feb 25, 2025 Pending
Array ( [id] => 20654339 [patent_doc_number] => 20260106364 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-04-16 [patent_title] => APPARATUS, SYSTEM, AND METHOD WITH SUPERCONDUCTING QUANTUM CIRCUIT [patent_app_type] => utility [patent_app_number] => 19/056705 [patent_app_country] => US [patent_app_date] => 2025-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3092 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19056705 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/056705
APPARATUS, SYSTEM, AND METHOD WITH SUPERCONDUCTING QUANTUM CIRCUIT Feb 17, 2025 Pending
Array ( [id] => 20054565 [patent_doc_number] => 20250192787 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-12 [patent_title] => DUAL MODE PHASE-LOCKED LOOP CIRCUIT, OSCILLATOR CIRCUIT, AND CONTROL METHOD OF OSCILLATOR CIRCUIT [patent_app_type] => utility [patent_app_number] => 19/054912 [patent_app_country] => US [patent_app_date] => 2025-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4274 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19054912 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/054912
DUAL MODE PHASE-LOCKED LOOP CIRCUIT, OSCILLATOR CIRCUIT, AND CONTROL METHOD OF OSCILLATOR CIRCUIT Feb 16, 2025 Pending
Array ( [id] => 20642343 [patent_doc_number] => 20260100703 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-04-09 [patent_title] => SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOF [patent_app_type] => utility [patent_app_number] => 19/054173 [patent_app_country] => US [patent_app_date] => 2025-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2342 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19054173 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/054173
SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOF Feb 13, 2025 Pending
Array ( [id] => 20182870 [patent_doc_number] => 20250266828 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-08-21 [patent_title] => Switching circuit [patent_app_type] => utility [patent_app_number] => 19/052921 [patent_app_country] => US [patent_app_date] => 2025-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19052921 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/052921
Switching circuit Feb 12, 2025 Pending
Array ( [id] => 20151910 [patent_doc_number] => 20250251748 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-08-07 [patent_title] => Voltage follower [patent_app_type] => utility [patent_app_number] => 19/034333 [patent_app_country] => US [patent_app_date] => 2025-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19034333 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/034333
Voltage follower Jan 21, 2025 Pending
Array ( [id] => 20589083 [patent_doc_number] => 20260074680 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-03-12 [patent_title] => High-Side Switch System, Method for Controlling the Same, Integrated Circuit Chip, and Electronic Device [patent_app_type] => utility [patent_app_number] => 19/034548 [patent_app_country] => US [patent_app_date] => 2025-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4801 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19034548 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/034548
High-Side Switch System, Method for Controlling the Same, Integrated Circuit Chip, and Electronic Device Jan 21, 2025 Pending
Array ( [id] => 20382495 [patent_doc_number] => 20250364988 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-11-27 [patent_title] => SEMICONDUCTOR DRIVE DEVICE AND SEMICONDUCTOR MODULE [patent_app_type] => utility [patent_app_number] => 19/032528 [patent_app_country] => US [patent_app_date] => 2025-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 884 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19032528 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/032528
SEMICONDUCTOR DRIVE DEVICE AND SEMICONDUCTOR MODULE Jan 20, 2025 Pending
Array ( [id] => 20837466 [patent_doc_number] => 20260196986 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-07-09 [patent_title] => MONOLITHICALLY INTEGRATED CHALCOGENIDE SWITCH MATRIX [patent_app_type] => utility [patent_app_number] => 19/013962 [patent_app_country] => US [patent_app_date] => 2025-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1146 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19013962 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/013962
MONOLITHICALLY INTEGRATED CHALCOGENIDE SWITCH MATRIX Jan 7, 2025 Pending
Array ( [id] => 20837477 [patent_doc_number] => 20260196997 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-07-09 [patent_title] => GROUND LOSS DETECTION AND OUTPUT CHANNEL DISABLEMENT [patent_app_type] => utility [patent_app_number] => 19/013986 [patent_app_country] => US [patent_app_date] => 2025-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19013986 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/013986
GROUND LOSS DETECTION AND OUTPUT CHANNEL DISABLEMENT Jan 7, 2025 Pending
Array ( [id] => 20124980 [patent_doc_number] => 20250240011 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-24 [patent_title] => ELECTRONIC CIRCUIT [patent_app_type] => utility [patent_app_number] => 18/986704 [patent_app_country] => US [patent_app_date] => 2024-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1132 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18986704 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/986704
ELECTRONIC CIRCUIT Dec 18, 2024 Pending
Array ( [id] => 20782077 [patent_doc_number] => 20260170274 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-06-18 [patent_title] => CURRENT-SOURCING TEMPERATURE COMPENSATED LOGARITHMIC TRANSIMPEDANCE AMPLIFIER USING NPN MATCHED TRANSISTORS WITH OUTPUT ADJUSTABLE VOLTAGE [patent_app_type] => utility [patent_app_number] => 18/985821 [patent_app_country] => US [patent_app_date] => 2024-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18985821 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/985821
CURRENT-SOURCING TEMPERATURE COMPENSATED LOGARITHMIC TRANSIMPEDANCE AMPLIFIER USING NPN MATCHED TRANSISTORS WITH OUTPUT ADJUSTABLE VOLTAGE Dec 17, 2024 Pending
Array ( [id] => 19894689 [patent_doc_number] => 20250120001 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-10 [patent_title] => ELECTRONIC POST FOR AMUSEMENT PARK SYSTEM [patent_app_type] => utility [patent_app_number] => 18/981857 [patent_app_country] => US [patent_app_date] => 2024-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9834 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18981857 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/981857
ELECTRONIC POST FOR AMUSEMENT PARK SYSTEM Dec 15, 2024 Pending
Array ( [id] => 19994457 [patent_doc_number] => 20250132679 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-24 [patent_title] => Voltage Transient Controlling in Configurable Integrated Voltage Regulation Schemes [patent_app_type] => utility [patent_app_number] => 18/981342 [patent_app_country] => US [patent_app_date] => 2024-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8943 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18981342 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/981342
Voltage Transient Controlling in Configurable Integrated Voltage Regulation Schemes Dec 12, 2024 Pending
Menu