Search

Ryan H. Ellis

Examiner (ID: 365)

Most Active Art Unit
3745
Art Unit(s)
3745
Total Applications
361
Issued Applications
222
Pending Applications
6
Abandoned Applications
135

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5414059 [patent_doc_number] => 20090039946 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-02-12 [patent_title] => 'FUSE CIRCUIT' [patent_app_type] => utility [patent_app_number] => 12/185837 [patent_app_country] => US [patent_app_date] => 2008-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 8214 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0039/20090039946.pdf [firstpage_image] =>[orig_patent_app_number] => 12185837 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/185837
Fuse circuit Aug 4, 2008 Issued
Array ( [id] => 6248269 [patent_doc_number] => 20100026380 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-02-04 [patent_title] => 'Reference Generating Apparatus and Sampling Apparatus Thereof' [patent_app_type] => utility [patent_app_number] => 12/182277 [patent_app_country] => US [patent_app_date] => 2008-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3278 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0026/20100026380.pdf [firstpage_image] =>[orig_patent_app_number] => 12182277 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/182277
Reference Generating Apparatus and Sampling Apparatus Thereof Jul 29, 2008 Abandoned
Array ( [id] => 6339369 [patent_doc_number] => 20100019836 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-01-28 [patent_title] => 'INTEGRATED CIRCUIT AND A METHOD FOR RECOVERING FROM A LOW-POWER PERIOD' [patent_app_type] => utility [patent_app_number] => 12/179828 [patent_app_country] => US [patent_app_date] => 2008-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3869 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0019/20100019836.pdf [firstpage_image] =>[orig_patent_app_number] => 12179828 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/179828
Integrated circuit and a method for recovering from a low-power period Jul 24, 2008 Issued
Array ( [id] => 14998 [patent_doc_number] => 07804335 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-09-28 [patent_title] => 'Alternating current level detection circuit' [patent_app_type] => utility [patent_app_number] => 12/174906 [patent_app_country] => US [patent_app_date] => 2008-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5887 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/804/07804335.pdf [firstpage_image] =>[orig_patent_app_number] => 12174906 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/174906
Alternating current level detection circuit Jul 16, 2008 Issued
Array ( [id] => 63925 [patent_doc_number] => 07764114 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-07-27 [patent_title] => 'Voltage divider and internal supply voltage generation circuit including the same' [patent_app_type] => utility [patent_app_number] => 12/218381 [patent_app_country] => US [patent_app_date] => 2008-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 5344 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/764/07764114.pdf [firstpage_image] =>[orig_patent_app_number] => 12218381 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/218381
Voltage divider and internal supply voltage generation circuit including the same Jul 14, 2008 Issued
Array ( [id] => 4578637 [patent_doc_number] => 07830205 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-11-09 [patent_title] => 'Fuse circuit for use in a semiconductor integrated apparatus' [patent_app_type] => utility [patent_app_number] => 12/171233 [patent_app_country] => US [patent_app_date] => 2008-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3343 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/830/07830205.pdf [firstpage_image] =>[orig_patent_app_number] => 12171233 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/171233
Fuse circuit for use in a semiconductor integrated apparatus Jul 9, 2008 Issued
Array ( [id] => 5294305 [patent_doc_number] => 20090009231 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-08 [patent_title] => 'DEVICE AND METHOD FOR POWER SWITCH MONITORING' [patent_app_type] => utility [patent_app_number] => 12/166674 [patent_app_country] => US [patent_app_date] => 2008-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4875 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0009/20090009231.pdf [firstpage_image] =>[orig_patent_app_number] => 12166674 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/166674
Device and method for power switch monitoring Jul 1, 2008 Issued
Array ( [id] => 4446401 [patent_doc_number] => 07863947 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-01-04 [patent_title] => 'Driving strength control circuit and data output circuit in semiconductor device' [patent_app_type] => utility [patent_app_number] => 12/215722 [patent_app_country] => US [patent_app_date] => 2008-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 5764 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/863/07863947.pdf [firstpage_image] =>[orig_patent_app_number] => 12215722 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/215722
Driving strength control circuit and data output circuit in semiconductor device Jun 29, 2008 Issued
Array ( [id] => 5315295 [patent_doc_number] => 20090279893 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-11-12 [patent_title] => 'ANALOG FINITE IMPULSE RESPONSE FILTER' [patent_app_type] => utility [patent_app_number] => 12/119394 [patent_app_country] => US [patent_app_date] => 2008-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6043 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0279/20090279893.pdf [firstpage_image] =>[orig_patent_app_number] => 12119394 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/119394
Analog finite impulse response filter May 11, 2008 Issued
Array ( [id] => 7592679 [patent_doc_number] => 07652523 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-01-26 [patent_title] => 'Ratioed feedback body voltage bias generator' [patent_app_type] => utility [patent_app_number] => 12/112356 [patent_app_country] => US [patent_app_date] => 2008-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 2036 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 312 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/652/07652523.pdf [firstpage_image] =>[orig_patent_app_number] => 12112356 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/112356
Ratioed feedback body voltage bias generator Apr 29, 2008 Issued
Array ( [id] => 5389603 [patent_doc_number] => 20090206915 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-08-20 [patent_title] => 'Two Stage Voltage Boost Circuit, IC and Design Structure' [patent_app_type] => utility [patent_app_number] => 12/031725 [patent_app_country] => US [patent_app_date] => 2008-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4148 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0206/20090206915.pdf [firstpage_image] =>[orig_patent_app_number] => 12031725 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/031725
Two stage voltage boost circuit, IC and design structure Feb 14, 2008 Issued
Array ( [id] => 5328438 [patent_doc_number] => 20090108915 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-04-30 [patent_title] => 'Charge Pump System and Method of Operating the Same' [patent_app_type] => utility [patent_app_number] => 12/031835 [patent_app_country] => US [patent_app_date] => 2008-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3297 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0108/20090108915.pdf [firstpage_image] =>[orig_patent_app_number] => 12031835 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/031835
Charge Pump System and Method of Operating the Same Feb 14, 2008 Abandoned
Array ( [id] => 5389605 [patent_doc_number] => 20090206917 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-08-20 [patent_title] => 'Two Stage Voltage Boost Circuit With Precharge Circuit Preventing Leakage, IC and Design Structure' [patent_app_type] => utility [patent_app_number] => 12/031731 [patent_app_country] => US [patent_app_date] => 2008-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4387 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0206/20090206917.pdf [firstpage_image] =>[orig_patent_app_number] => 12031731 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/031731
Two stage voltage boost circuit with precharge circuit preventing leakage, IC and design structure Feb 14, 2008 Issued
Array ( [id] => 5389604 [patent_doc_number] => 20090206916 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-08-20 [patent_title] => 'Voltage Boost System, IC and Design Structure' [patent_app_type] => utility [patent_app_number] => 12/031729 [patent_app_country] => US [patent_app_date] => 2008-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5308 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0206/20090206916.pdf [firstpage_image] =>[orig_patent_app_number] => 12031729 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/031729
Voltage boost system, IC and design structure Feb 14, 2008 Issued
Array ( [id] => 4518923 [patent_doc_number] => 07932770 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-04-26 [patent_title] => 'Charge pump circuit' [patent_app_type] => utility [patent_app_number] => 12/027593 [patent_app_country] => US [patent_app_date] => 2008-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 37 [patent_no_of_words] => 14843 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 232 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/932/07932770.pdf [firstpage_image] =>[orig_patent_app_number] => 12027593 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/027593
Charge pump circuit Feb 6, 2008 Issued
Array ( [id] => 5353051 [patent_doc_number] => 20090184395 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-07-23 [patent_title] => 'INPUT/OUTPUT (I/O) BUFFER' [patent_app_type] => utility [patent_app_number] => 12/018206 [patent_app_country] => US [patent_app_date] => 2008-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 2803 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0184/20090184395.pdf [firstpage_image] =>[orig_patent_app_number] => 12018206 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/018206
INPUT/OUTPUT (I/O) BUFFER Jan 22, 2008 Abandoned
Array ( [id] => 5432031 [patent_doc_number] => 20090166617 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-07-02 [patent_title] => 'INTEGRATED CIRCUIT AND METHOD FOR OPERATING' [patent_app_type] => utility [patent_app_number] => 11/965959 [patent_app_country] => US [patent_app_date] => 2007-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5650 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0166/20090166617.pdf [firstpage_image] =>[orig_patent_app_number] => 11965959 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/965959
Integrated circuit and method for operating Dec 27, 2007 Issued
Array ( [id] => 4473259 [patent_doc_number] => 07944286 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-05-17 [patent_title] => 'Systems and methods for filter tuning using binary search algorithm' [patent_app_type] => utility [patent_app_number] => 12/515856 [patent_app_country] => US [patent_app_date] => 2007-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3451 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/944/07944286.pdf [firstpage_image] =>[orig_patent_app_number] => 12515856 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/515856
Systems and methods for filter tuning using binary search algorithm Nov 29, 2007 Issued
Array ( [id] => 4446433 [patent_doc_number] => 07863971 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-01-04 [patent_title] => 'Configurable power controller' [patent_app_type] => utility [patent_app_number] => 11/998009 [patent_app_country] => US [patent_app_date] => 2007-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2797 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/863/07863971.pdf [firstpage_image] =>[orig_patent_app_number] => 11998009 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/998009
Configurable power controller Nov 26, 2007 Issued
Array ( [id] => 6355587 [patent_doc_number] => 20100073080 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-03-25 [patent_title] => 'AUTOMATIC GAIN CONTROL CIRCUIT AND METHOD FOR AUTOMATIC GAIN CONTROL' [patent_app_type] => utility [patent_app_number] => 12/516741 [patent_app_country] => US [patent_app_date] => 2007-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4332 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0073/20100073080.pdf [firstpage_image] =>[orig_patent_app_number] => 12516741 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/516741
AUTOMATIC GAIN CONTROL CIRCUIT AND METHOD FOR AUTOMATIC GAIN CONTROL Nov 22, 2007 Abandoned
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