
Ryan H. Ellis
Examiner (ID: 365)
| Most Active Art Unit | 3745 |
| Art Unit(s) | 3745 |
| Total Applications | 361 |
| Issued Applications | 222 |
| Pending Applications | 6 |
| Abandoned Applications | 135 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 6540049
[patent_doc_number] => 20020163379
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-11-07
[patent_title] => 'CMOS reference voltage circuit'
[patent_app_type] => new
[patent_app_number] => 10/091776
[patent_app_country] => US
[patent_app_date] => 2002-03-05
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[pdf_file] => publications/A1/0163/20020163379.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/091776 | CMOS reference voltage circuit | Mar 4, 2002 | Issued |
Array
(
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[patent_doc_number] => 06617914
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-09-09
[patent_title] => 'Electrical antifuse with external capacitance'
[patent_app_type] => B1
[patent_app_number] => 10/092114
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[firstpage_image] =>[orig_patent_app_number] => 10092114
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Array
(
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[patent_doc_number] => 20020125936
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[patent_issue_date] => 2002-09-12
[patent_title] => 'Raised voltage generation circuit'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/087720 | Raised voltage generation circuit | Feb 27, 2002 | Issued |
Array
(
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[patent_doc_number] => 20020079949
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[patent_issue_date] => 2002-06-27
[patent_title] => 'Configurable electronic circuit'
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Array
(
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[patent_doc_number] => 06642779
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[patent_issue_date] => 2003-11-04
[patent_title] => 'Trimming impedance between two nodes connected to a non-fixed voltage level'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/080535 | Trimming impedance between two nodes connected to a non-fixed voltage level | Feb 24, 2002 | Issued |
Array
(
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[patent_issue_date] => 2003-10-28
[patent_title] => 'Multiple circuit blocks with interblock control and power conservation'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/081186 | Multiple circuit blocks with interblock control and power conservation | Feb 24, 2002 | Issued |
Array
(
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[patent_doc_number] => 06597236
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[patent_issue_date] => 2003-07-22
[patent_title] => 'Potential detecting circuit for determining whether a detected potential has reached a prescribed level'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/081856 | Potential detecting circuit for determining whether a detected potential has reached a prescribed level | Feb 24, 2002 | Issued |
Array
(
[id] => 1207541
[patent_doc_number] => 06717459
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-04-06
[patent_title] => 'Capacitor charge sharing charge pump'
[patent_app_type] => B2
[patent_app_number] => 10/078418
[patent_app_country] => US
[patent_app_date] => 2002-02-21
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[firstpage_image] =>[orig_patent_app_number] => 10078418
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/078418 | Capacitor charge sharing charge pump | Feb 20, 2002 | Issued |
Array
(
[id] => 1322799
[patent_doc_number] => 06605988
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-08-12
[patent_title] => 'Low voltage temperature-independent and temperature-dependent voltage generator'
[patent_app_type] => B1
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/078140 | Low voltage temperature-independent and temperature-dependent voltage generator | Feb 18, 2002 | Issued |
Array
(
[id] => 6738596
[patent_doc_number] => 20030155964
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[patent_issue_date] => 2003-08-21
[patent_title] => 'Increasing power supply noise rejection using linear voltage regulators in an on-chip temperature sensor'
[patent_app_type] => new
[patent_app_number] => 10/078130
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/078130 | Increasing power supply noise rejection using linear voltage regulators in an on-chip temperature sensor | Feb 18, 2002 | Issued |
Array
(
[id] => 6368531
[patent_doc_number] => 20020118059
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[patent_issue_date] => 2002-08-29
[patent_title] => 'Negative voltage boosting circuit'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/080194 | Negative voltage boosting circuit | Feb 18, 2002 | Issued |
Array
(
[id] => 1399669
[patent_doc_number] => 06549063
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[patent_issue_date] => 2003-04-15
[patent_title] => 'Evaluation circuit for an anti-fuse'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/044470 | Evaluation circuit for an anti-fuse | Jan 10, 2002 | Issued |
Array
(
[id] => 1410312
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[patent_title] => 'Low jitter transmitter architecture with post PLL filter'
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Array
(
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/041677 | Filtering variable offset amplifer | Jan 6, 2002 | Issued |
Array
(
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Array
(
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Array
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/029530 | Circuit and method for discharging high voltage signals | Dec 19, 2001 | Issued |