Ryan H. Ellis

Array ( [id] => 7643317 [patent_doc_number] => 06429725 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-06 [patent_title] => 'Pump circuit with active-mode and stand-by mode booster circuits' [patent_app_type] => B1 [patent_app_number] => 09/874206 [patent_app_country] => US [patent_app_date] => 2001-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 28 [patent_no_of_words] => 12021 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 5 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/429/06429725.pdf [firstpage_image] =>[orig_patent_app_number] => 09874206 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7626408 [patent_doc_number] => 06768355 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-07-27 [patent_title] => 'Transient rejecting circuit' [patent_app_type] => B1 [patent_app_number] => 09/848625 [patent_app_country] => US [patent_app_date] => 2001-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5475 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 12 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/768/06768355.pdf [firstpage_image] =>[orig_patent_app_number] => 09848625 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6448056 [patent_doc_number] => 20020149419 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-17 [patent_title] => 'Low power large signal RF tuned buffer amplifier' [patent_app_type] => new [patent_app_number] => 09/835021 [patent_app_country] => US [patent_app_date] => 2001-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6617 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0149/20020149419.pdf [firstpage_image] =>[orig_patent_app_number] => 09835021 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6447971 [patent_doc_number] => 20020149410 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-17 [patent_title] => 'METHOD AND APPARATUS FOR LATCHING DATA WITHIN A DIGITAL SYSTEM' [patent_app_type] => new [patent_app_number] => 09/834772 [patent_app_country] => US [patent_app_date] => 2001-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3540 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0149/20020149410.pdf [firstpage_image] =>[orig_patent_app_number] => 09834772 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1481511 [patent_doc_number] => 06452436 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-17 [patent_title] => 'Apparatus and method for managing automatic transitions between multiple feedback paths' [patent_app_type] => B1 [patent_app_number] => 09/833985 [patent_app_country] => US [patent_app_date] => 2001-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 4694 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/452/06452436.pdf [firstpage_image] =>[orig_patent_app_number] => 09833985 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6879289 [patent_doc_number] => 20010030574 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-10-18 [patent_title] => 'Differential amplifier circuit' [patent_app_type] => new [patent_app_number] => 09/833974 [patent_app_country] => US [patent_app_date] => 2001-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4872 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0030/20010030574.pdf [firstpage_image] =>[orig_patent_app_number] => 09833974 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1469108 [patent_doc_number] => 06459325 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-10-01 [patent_title] => 'Output buffer having a pre-driver transition controller' [patent_app_type] => B1 [patent_app_number] => 09/832149 [patent_app_country] => US [patent_app_date] => 2001-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 4823 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 219 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/459/06459325.pdf [firstpage_image] =>[orig_patent_app_number] => 09832149 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7645063 [patent_doc_number] => 06472910 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-10-29 [patent_title] => 'Electrical load driving device' [patent_app_type] => B2 [patent_app_number] => 09/828123 [patent_app_country] => US [patent_app_date] => 2001-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5921 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 7 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/472/06472910.pdf [firstpage_image] =>[orig_patent_app_number] => 09828123 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5910696 [patent_doc_number] => 20020144229 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-03 [patent_title] => 'Faster scalable floorplan which enables easier data control flow' [patent_app_type] => new [patent_app_number] => 09/824990 [patent_app_country] => US [patent_app_date] => 2001-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 1479 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0144/20020144229.pdf [firstpage_image] =>[orig_patent_app_number] => 09824990 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1402248 [patent_doc_number] => 06564357 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-05-13 [patent_title] => 'Performance verification/analysis tool for full-chip designs' [patent_app_type] => B2 [patent_app_number] => 09/820876 [patent_app_country] => US [patent_app_date] => 2001-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 3546 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/564/06564357.pdf [firstpage_image] =>[orig_patent_app_number] => 09820876 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7643337 [patent_doc_number] => 06429705 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-06 [patent_title] => 'Resetting circuit independent of a transistor\'s threshold' [patent_app_type] => B1 [patent_app_number] => 09/820714 [patent_app_country] => US [patent_app_date] => 2001-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6641 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 5 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/429/06429705.pdf [firstpage_image] =>[orig_patent_app_number] => 09820714 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1598452 [patent_doc_number] => 06492849 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-12-10 [patent_title] => 'Supply voltage detection circuit' [patent_app_type] => B2 [patent_app_number] => 09/820842 [patent_app_country] => US [patent_app_date] => 2001-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 14 [patent_no_of_words] => 2132 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/492/06492849.pdf [firstpage_image] =>[orig_patent_app_number] => 09820842 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6895385 [patent_doc_number] => 20010026175 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-10-04 [patent_title] => 'Sample-and-hold circuit' [patent_app_type] => new [patent_app_number] => 09/819616 [patent_app_country] => US [patent_app_date] => 2001-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4924 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0026/20010026175.pdf [firstpage_image] =>[orig_patent_app_number] => 09819616 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1429928 [patent_doc_number] => 06504419 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-01-07 [patent_title] => 'High-speed closed loop switch and method for video and communications signals' [patent_app_type] => B1 [patent_app_number] => 09/819246 [patent_app_country] => US [patent_app_date] => 2001-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 5291 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 259 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/504/06504419.pdf [firstpage_image] =>[orig_patent_app_number] => 09819246 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1576951 [patent_doc_number] => 06469572 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-10-22 [patent_title] => 'Forward body bias generation circuits based on diode clamps' [patent_app_type] => B1 [patent_app_number] => 09/821531 [patent_app_country] => US [patent_app_date] => 2001-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 3041 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/469/06469572.pdf [firstpage_image] =>[orig_patent_app_number] => 09821531 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5901988 [patent_doc_number] => 20020140489 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-03 [patent_title] => 'Method and apparatus for electro-static discharge protection' [patent_app_type] => new [patent_app_number] => 09/820111 [patent_app_country] => US [patent_app_date] => 2001-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3559 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0140/20020140489.pdf [firstpage_image] =>[orig_patent_app_number] => 09820111 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5902003 [patent_doc_number] => 20020140494 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-03 [patent_title] => 'On-chip power supply boost for voltage droop reduction' [patent_app_type] => new [patent_app_number] => 09/819135 [patent_app_country] => US [patent_app_date] => 2001-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1367 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0140/20020140494.pdf [firstpage_image] =>[orig_patent_app_number] => 09819135 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1192755 [patent_doc_number] => 06735755 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-05-11 [patent_title] => 'Cost saving methods using pre-defined integrated circuit modules' [patent_app_type] => B2 [patent_app_number] => 09/817936 [patent_app_country] => US [patent_app_date] => 2001-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 7924 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/735/06735755.pdf [firstpage_image] =>[orig_patent_app_number] => 09817936 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7643316 [patent_doc_number] => 06429726 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-06 [patent_title] => 'Robust forward body bias generation circuit with digital trimming for DC power supply variation' [patent_app_type] => B1 [patent_app_number] => 09/820067 [patent_app_country] => US [patent_app_date] => 2001-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3241 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 5 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/429/06429726.pdf [firstpage_image] =>[orig_patent_app_number] => 09820067 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7643311 [patent_doc_number] => 06429731 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-08-06 [patent_title] => 'CMOS voltage divider' [patent_app_type] => B2 [patent_app_number] => 09/816934 [patent_app_country] => US [patent_app_date] => 2001-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 1557 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 6 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/429/06429731.pdf [firstpage_image] =>[orig_patent_app_number] => 09816934 [rel_patent_id] =>[rel_patent_doc_number] =>)