Ryan H. Ellis

Array ( [id] => 3530803 [patent_doc_number] => 05528183 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-06-18 [patent_title] => 'Serial clock synchronization circuit' [patent_app_type] => 1 [patent_app_number] => 8/191890 [patent_app_country] => US [patent_app_date] => 1994-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 1905 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/528/05528183.pdf [firstpage_image] =>[orig_patent_app_number] => 191890 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3117300 [patent_doc_number] => 05465064 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-11-07 [patent_title] => 'Weighted summing circuit' [patent_app_type] => 1 [patent_app_number] => 8/190926 [patent_app_country] => US [patent_app_date] => 1994-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2348 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/465/05465064.pdf [firstpage_image] =>[orig_patent_app_number] => 190926 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3572190 [patent_doc_number] => 05485110 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-01-16 [patent_title] => 'ECL differential multiplexing circuit' [patent_app_type] => 1 [patent_app_number] => 8/189776 [patent_app_country] => US [patent_app_date] => 1994-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 5530 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 315 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/485/05485110.pdf [firstpage_image] =>[orig_patent_app_number] => 189776 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3620074 [patent_doc_number] => 05510750 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-04-23 [patent_title] => 'Bias circuit for providing a stable output current' [patent_app_type] => 1 [patent_app_number] => 8/189545 [patent_app_country] => US [patent_app_date] => 1994-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 1473 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 237 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/510/05510750.pdf [firstpage_image] =>[orig_patent_app_number] => 189545 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3639960 [patent_doc_number] => 05610550 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-03-11 [patent_title] => 'Intermediate potential generator stably providing an internal voltage precisely held at a predeterminded intermediate potential level with reduced current consumption' [patent_app_type] => 1 [patent_app_number] => 8/190329 [patent_app_country] => US [patent_app_date] => 1994-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 19002 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/610/05610550.pdf [firstpage_image] =>[orig_patent_app_number] => 190329 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3521383 [patent_doc_number] => 05486781 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-01-23 [patent_title] => 'Base current-control circuit of an output transistor' [patent_app_type] => 1 [patent_app_number] => 8/187038 [patent_app_country] => US [patent_app_date] => 1994-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 1945 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/486/05486781.pdf [firstpage_image] =>[orig_patent_app_number] => 187038 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3119626 [patent_doc_number] => 05410191 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-04-25 [patent_title] => 'Monostable multivibrator' [patent_app_type] => 1 [patent_app_number] => 8/187819 [patent_app_country] => US [patent_app_date] => 1994-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 17 [patent_no_of_words] => 8806 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/410/05410191.pdf [firstpage_image] =>[orig_patent_app_number] => 187819 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3581204 [patent_doc_number] => 05523708 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-06-04 [patent_title] => 'Apparatus for monitoring abnormality of each clock driver input and output signal in a circuit comprising a plurality of clock drivers' [patent_app_type] => 1 [patent_app_number] => 8/187098 [patent_app_country] => US [patent_app_date] => 1994-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 3638 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 250 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/523/05523708.pdf [firstpage_image] =>[orig_patent_app_number] => 187098 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3454499 [patent_doc_number] => 05424670 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-06-13 [patent_title] => 'Precision switched capacitor ratio system' [patent_app_type] => 1 [patent_app_number] => 8/167540 [patent_app_country] => US [patent_app_date] => 1994-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 12 [patent_no_of_words] => 2694 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/424/05424670.pdf [firstpage_image] =>[orig_patent_app_number] => 167540 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3587079 [patent_doc_number] => 05498993 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-03-12 [patent_title] => 'Pulse light-receiving circuit with means to minimize power source noise' [patent_app_type] => 1 [patent_app_number] => 8/180335 [patent_app_country] => US [patent_app_date] => 1994-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 19 [patent_no_of_words] => 9931 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 272 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/498/05498993.pdf [firstpage_image] =>[orig_patent_app_number] => 180335 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3429170 [patent_doc_number] => 05422591 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-06-06 [patent_title] => 'Output driver circuit with body bias control for multiple power supply operation' [patent_app_type] => 1 [patent_app_number] => 8/176960 [patent_app_country] => US [patent_app_date] => 1994-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3254 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/422/05422591.pdf [firstpage_image] =>[orig_patent_app_number] => 176960 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3451379 [patent_doc_number] => 05420533 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-05-30 [patent_title] => 'Pull-down circuit for wide voltage operation' [patent_app_type] => 1 [patent_app_number] => 8/173995 [patent_app_country] => US [patent_app_date] => 1993-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2408 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/420/05420533.pdf [firstpage_image] =>[orig_patent_app_number] => 173995 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3526653 [patent_doc_number] => 05489861 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-02-06 [patent_title] => 'High power, edge controlled output buffer' [patent_app_type] => 1 [patent_app_number] => 8/170511 [patent_app_country] => US [patent_app_date] => 1993-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6081 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/489/05489861.pdf [firstpage_image] =>[orig_patent_app_number] => 170511 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3112040 [patent_doc_number] => 05418481 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-05-23 [patent_title] => 'Repetitive signal detector for preventing thermal runaway' [patent_app_type] => 1 [patent_app_number] => 8/165747 [patent_app_country] => US [patent_app_date] => 1993-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 2387 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/418/05418481.pdf [firstpage_image] =>[orig_patent_app_number] => 165747 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3431420 [patent_doc_number] => 05404050 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-04-04 [patent_title] => 'Single-to-differential converter' [patent_app_type] => 1 [patent_app_number] => 8/164184 [patent_app_country] => US [patent_app_date] => 1993-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 2714 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 262 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/404/05404050.pdf [firstpage_image] =>[orig_patent_app_number] => 164184 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3124582 [patent_doc_number] => 05381054 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-01-10 [patent_title] => 'Multiple input comparator circuit for a switched resistive network' [patent_app_type] => 1 [patent_app_number] => 8/163315 [patent_app_country] => US [patent_app_date] => 1993-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2902 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/381/05381054.pdf [firstpage_image] =>[orig_patent_app_number] => 163315 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3484433 [patent_doc_number] => 05399927 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-03-21 [patent_title] => 'Solid state bypass circuit for RF and microwave active circuits' [patent_app_type] => 1 [patent_app_number] => 8/162714 [patent_app_country] => US [patent_app_date] => 1993-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 2622 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/399/05399927.pdf [firstpage_image] =>[orig_patent_app_number] => 162714 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3620032 [patent_doc_number] => 05510747 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-04-23 [patent_title] => 'Gate drive technique for a bidirectional blocking lateral MOSFET' [patent_app_type] => 1 [patent_app_number] => 8/160560 [patent_app_country] => US [patent_app_date] => 1993-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 31 [patent_no_of_words] => 6939 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/510/05510747.pdf [firstpage_image] =>[orig_patent_app_number] => 160560 [rel_patent_id] =>[rel_patent_doc_number] =>)