Search

Ryan Johnson

Examiner (ID: 3839, Phone: (571)270-1264 , Office: P/2842 )

Most Active Art Unit
2849
Art Unit(s)
2836, 2842, 2843, 2817, 2849
Total Applications
1601
Issued Applications
1321
Pending Applications
84
Abandoned Applications
219

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17294228 [patent_doc_number] => 20210390067 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-16 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/318669 [patent_app_country] => US [patent_app_date] => 2021-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4925 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17318669 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/318669
Semiconductor device May 11, 2021 Issued
Array ( [id] => 18053073 [patent_doc_number] => 11526458 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-13 [patent_title] => Method of operating a communication bus, corresponding system, devices and vehicle [patent_app_type] => utility [patent_app_number] => 17/245894 [patent_app_country] => US [patent_app_date] => 2021-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 16 [patent_no_of_words] => 11981 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17245894 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/245894
Method of operating a communication bus, corresponding system, devices and vehicle Apr 29, 2021 Issued
Array ( [id] => 17023962 [patent_doc_number] => 20210247833 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-08-12 [patent_title] => POWER MANAGEMENT SYSTEM [patent_app_type] => utility [patent_app_number] => 17/244693 [patent_app_country] => US [patent_app_date] => 2021-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8638 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17244693 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/244693
POWER MANAGEMENT SYSTEM Apr 28, 2021 Abandoned
Array ( [id] => 17931953 [patent_doc_number] => 20220327078 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-13 [patent_title] => ON-CHIP NON-POWER OF TWO DATA TRANSACTIONS [patent_app_type] => utility [patent_app_number] => 17/228471 [patent_app_country] => US [patent_app_date] => 2021-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4549 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17228471 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/228471
On-chip non-power of two data transactions Apr 11, 2021 Issued
Array ( [id] => 17542891 [patent_doc_number] => 11308014 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-04-19 [patent_title] => Bi-directional signal transmission connection cable [patent_app_type] => utility [patent_app_number] => 17/220410 [patent_app_country] => US [patent_app_date] => 2021-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 5428 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 387 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17220410 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/220410
Bi-directional signal transmission connection cable Mar 31, 2021 Issued
Array ( [id] => 17128732 [patent_doc_number] => 20210303501 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-30 [patent_title] => METHOD FOR PROGRAMMING A PROGRAMMABLE GATE ARRAY IN A DISTRIBUTED COMPUTER SYSTEM [patent_app_type] => utility [patent_app_number] => 17/215967 [patent_app_country] => US [patent_app_date] => 2021-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6790 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17215967 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/215967
Method for programming a programmable gate array in a distributed computer system Mar 28, 2021 Issued
Array ( [id] => 17622025 [patent_doc_number] => 11341081 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-05-24 [patent_title] => Propagation delay compensation for SPI interfaces [patent_app_type] => utility [patent_app_number] => 17/197945 [patent_app_country] => US [patent_app_date] => 2021-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 7749 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17197945 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/197945
Propagation delay compensation for SPI interfaces Mar 9, 2021 Issued
Array ( [id] => 17301739 [patent_doc_number] => 20210397578 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-23 [patent_title] => ONE-WAY BUS BRIDGE [patent_app_type] => utility [patent_app_number] => 17/196974 [patent_app_country] => US [patent_app_date] => 2021-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13763 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17196974 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/196974
ONE-WAY BUS BRIDGE Mar 8, 2021 Abandoned
Array ( [id] => 17039344 [patent_doc_number] => 20210255980 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-08-19 [patent_title] => TECHNOLOGIES FOR FAST MAUSB ENUMERATION [patent_app_type] => utility [patent_app_number] => 17/187112 [patent_app_country] => US [patent_app_date] => 2021-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18274 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17187112 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/187112
Technologies for fast MAUSB enumeration Feb 25, 2021 Issued
Array ( [id] => 17589646 [patent_doc_number] => 11327919 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-10 [patent_title] => Systems, computer-readable media and computer-implemented methods for network adapter activation in connection with fibre channel uplink mapping [patent_app_type] => utility [patent_app_number] => 17/184676 [patent_app_country] => US [patent_app_date] => 2021-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 8068 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17184676 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/184676
Systems, computer-readable media and computer-implemented methods for network adapter activation in connection with fibre channel uplink mapping Feb 24, 2021 Issued
Array ( [id] => 17824340 [patent_doc_number] => 11429288 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-08-30 [patent_title] => System and method to secure ports on a computer [patent_app_type] => utility [patent_app_number] => 17/184641 [patent_app_country] => US [patent_app_date] => 2021-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4706 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17184641 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/184641
System and method to secure ports on a computer Feb 24, 2021 Issued
Array ( [id] => 18268518 [patent_doc_number] => 20230089760 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-23 [patent_title] => SINGLE-LEVEL SINGLE-LINE FULL-DUPLEX BUS COMMUNICATION METHOD AND SYSTEM [patent_app_type] => utility [patent_app_number] => 17/798608 [patent_app_country] => US [patent_app_date] => 2021-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2651 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17798608 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/798608
Single-level single-line full-duplex bus communication method and system Feb 24, 2021 Issued
Array ( [id] => 18414798 [patent_doc_number] => 11669340 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-06 [patent_title] => Syncing settings across incompatible operating systems [patent_app_type] => utility [patent_app_number] => 17/183278 [patent_app_country] => US [patent_app_date] => 2021-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 8454 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17183278 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/183278
Syncing settings across incompatible operating systems Feb 22, 2021 Issued
Array ( [id] => 18592127 [patent_doc_number] => 11741025 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-29 [patent_title] => Storage system and method for providing a dual-priority credit system [patent_app_type] => utility [patent_app_number] => 17/178401 [patent_app_country] => US [patent_app_date] => 2021-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 6979 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17178401 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/178401
Storage system and method for providing a dual-priority credit system Feb 17, 2021 Issued
Array ( [id] => 18303432 [patent_doc_number] => 11625335 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-04-11 [patent_title] => Adaptive address translation caches [patent_app_type] => utility [patent_app_number] => 17/170460 [patent_app_country] => US [patent_app_date] => 2021-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 13349 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17170460 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/170460
Adaptive address translation caches Feb 7, 2021 Issued
Array ( [id] => 18796427 [patent_doc_number] => 11830243 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-28 [patent_title] => Bus translator [patent_app_type] => utility [patent_app_number] => 17/154671 [patent_app_country] => US [patent_app_date] => 2021-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 8160 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17154671 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/154671
Bus translator Jan 20, 2021 Issued
Array ( [id] => 16810542 [patent_doc_number] => 20210133097 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-06 [patent_title] => SIGNAL COLLECTION METHOD AND SIGNAL COLLECTION DEVICE [patent_app_type] => utility [patent_app_number] => 17/145091 [patent_app_country] => US [patent_app_date] => 2021-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11453 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17145091 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/145091
Signal collection method and signal collection device Jan 7, 2021 Issued
Array ( [id] => 17409050 [patent_doc_number] => 11249935 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-02-15 [patent_title] => Single- and multi-channel, multi-latency payload bus [patent_app_type] => utility [patent_app_number] => 17/142944 [patent_app_country] => US [patent_app_date] => 2021-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4656 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17142944 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/142944
Single- and multi-channel, multi-latency payload bus Jan 5, 2021 Issued
Array ( [id] => 17613930 [patent_doc_number] => 20220156210 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-19 [patent_title] => PROCESSING AND STORAGE CIRCUIT [patent_app_type] => utility [patent_app_number] => 17/139004 [patent_app_country] => US [patent_app_date] => 2020-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3566 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17139004 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/139004
Processing and storage circuit Dec 30, 2020 Issued
Array ( [id] => 16851345 [patent_doc_number] => 20210152090 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-20 [patent_title] => STACKED BUCK CONVERTER WITH INDUCTOR SWITCHING NODE PRE-CHARGE AND CONDUCTION MODULATION CONTROL [patent_app_type] => utility [patent_app_number] => 17/132814 [patent_app_country] => US [patent_app_date] => 2020-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18408 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17132814 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/132814
Stacked buck converter with inductor switching node pre-charge and conduction modulation control Dec 22, 2020 Issued
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