Search

Ryan Johnson

Examiner (ID: 3839, Phone: (571)270-1264 , Office: P/2842 )

Most Active Art Unit
2849
Art Unit(s)
2836, 2842, 2843, 2817, 2849
Total Applications
1601
Issued Applications
1321
Pending Applications
84
Abandoned Applications
219

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 15151645 [patent_doc_number] => 20190354300 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-21 [patent_title] => HIERARCHICAL CLOCK SCALING IN A DATA STORAGE CONTROLLER [patent_app_type] => utility [patent_app_number] => 15/984253 [patent_app_country] => US [patent_app_date] => 2018-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11143 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15984253 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/984253
Hierarchical clock scaling in a data storage controller May 17, 2018 Issued
Array ( [id] => 16200371 [patent_doc_number] => 10725531 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-07-28 [patent_title] => Mitigating thermal increases in electronic devices [patent_app_type] => utility [patent_app_number] => 15/980393 [patent_app_country] => US [patent_app_date] => 2018-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 17197 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15980393 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/980393
Mitigating thermal increases in electronic devices May 14, 2018 Issued
Array ( [id] => 15820351 [patent_doc_number] => 10635352 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-04-28 [patent_title] => Distributed flash interface module processing [patent_app_type] => utility [patent_app_number] => 15/976456 [patent_app_country] => US [patent_app_date] => 2018-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8067 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15976456 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/976456
Distributed flash interface module processing May 9, 2018 Issued
Array ( [id] => 14705393 [patent_doc_number] => 10380446 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-08-13 [patent_title] => Bus translator [patent_app_type] => utility [patent_app_number] => 15/967176 [patent_app_country] => US [patent_app_date] => 2018-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 8102 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15967176 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/967176
Bus translator Apr 29, 2018 Issued
Array ( [id] => 16171791 [patent_doc_number] => 10713363 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-07-14 [patent_title] => System and method of configuring information handling systems [patent_app_type] => utility [patent_app_number] => 15/964595 [patent_app_country] => US [patent_app_date] => 2018-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 8412 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15964595 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/964595
System and method of configuring information handling systems Apr 26, 2018 Issued
Array ( [id] => 13807307 [patent_doc_number] => 10180920 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-01-15 [patent_title] => Apparatuses and methods for asymmetric input/output interface for a memory [patent_app_type] => utility [patent_app_number] => 15/963615 [patent_app_country] => US [patent_app_date] => 2018-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6099 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15963615 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/963615
Apparatuses and methods for asymmetric input/output interface for a memory Apr 25, 2018 Issued
Array ( [id] => 14250323 [patent_doc_number] => 10275362 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-30 [patent_title] => Dynamic address translation table allocation [patent_app_type] => utility [patent_app_number] => 15/953226 [patent_app_country] => US [patent_app_date] => 2018-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3295 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15953226 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/953226
Dynamic address translation table allocation Apr 12, 2018 Issued
Array ( [id] => 13332803 [patent_doc_number] => 20180217939 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-02 [patent_title] => DEFERRING REGISTRATION FOR DMA OPERATIONS [patent_app_type] => utility [patent_app_number] => 15/928453 [patent_app_country] => US [patent_app_date] => 2018-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3922 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15928453 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/928453
Deferring registration for DMA operations Mar 21, 2018 Issued
Array ( [id] => 13382759 [patent_doc_number] => 20180242921 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-30 [patent_title] => SYSTEM FOR DISPLAYING MEDICAL MONITORING DATA [patent_app_type] => utility [patent_app_number] => 15/919792 [patent_app_country] => US [patent_app_date] => 2018-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 24627 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15919792 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/919792
System for displaying medical monitoring data Mar 12, 2018 Issued
Array ( [id] => 12914803 [patent_doc_number] => 20180196777 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-07-12 [patent_title] => METHODS TO SEND EXTRA INFORMATION IN-BAND ON INTER-INTEGRATED CIRCUIT (I2C) BUS [patent_app_type] => utility [patent_app_number] => 15/917507 [patent_app_country] => US [patent_app_date] => 2018-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11181 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15917507 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/917507
METHODS TO SEND EXTRA INFORMATION IN-BAND ON INTER-INTEGRATED CIRCUIT (I2C) BUS Mar 8, 2018 Abandoned
Array ( [id] => 12869038 [patent_doc_number] => 20180181521 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-28 [patent_title] => SYSTEMS AND METHODS FOR FLIPPING NIC TEAMING CONFIGURATION WITHOUT INTERFERING LIVE TRAFFIC [patent_app_type] => utility [patent_app_number] => 15/903541 [patent_app_country] => US [patent_app_date] => 2018-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4178 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15903541 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/903541
Systems and methods for flipping NIC teaming configuration without interfering live traffic Feb 22, 2018 Issued
Array ( [id] => 13361563 [patent_doc_number] => 20180232321 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-16 [patent_title] => OPTIMIZING NETWORK DRIVER PERFORMANCE AND POWER CONSUMPTION IN MULTI-CORE PROCESSOR-BASED SYSTEMS [patent_app_type] => utility [patent_app_number] => 15/897871 [patent_app_country] => US [patent_app_date] => 2018-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5444 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15897871 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/897871
Optimizing network driver performance and power consumption in multi-core processor-based systems Feb 14, 2018 Issued
Array ( [id] => 15919565 [patent_doc_number] => 10657022 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-19 [patent_title] => Input and output recording device and method, CPU and data read and write operation method thereof [patent_app_type] => utility [patent_app_number] => 15/895686 [patent_app_country] => US [patent_app_date] => 2018-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 11440 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15895686 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/895686
Input and output recording device and method, CPU and data read and write operation method thereof Feb 12, 2018 Issued
Array ( [id] => 12797341 [patent_doc_number] => 20180157616 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-07 [patent_title] => CLOCK GATING CIRCUIT [patent_app_type] => utility [patent_app_number] => 15/887629 [patent_app_country] => US [patent_app_date] => 2018-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6652 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15887629 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/887629
Clock gating circuit Feb 1, 2018 Issued
Array ( [id] => 13332843 [patent_doc_number] => 20180217959 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-02 [patent_title] => BUS INTERFACE SYSTEM FOR POWER EXTRACTION [patent_app_type] => utility [patent_app_number] => 15/886209 [patent_app_country] => US [patent_app_date] => 2018-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8915 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15886209 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/886209
Bus interface system for power extraction Jan 31, 2018 Issued
Array ( [id] => 14657825 [patent_doc_number] => 20190236041 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-01 [patent_title] => MULTIMODE AUDIO ACCESSORY CONNECTOR [patent_app_type] => utility [patent_app_number] => 15/886668 [patent_app_country] => US [patent_app_date] => 2018-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6132 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15886668 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/886668
Multimode audio accessory connector Jan 31, 2018 Issued
Array ( [id] => 16721956 [patent_doc_number] => 20210089103 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-25 [patent_title] => CHANGING POWER STATES [patent_app_type] => utility [patent_app_number] => 16/954787 [patent_app_country] => US [patent_app_date] => 2018-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6398 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16954787 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/954787
CHANGING POWER STATES Jan 30, 2018 Abandoned
Array ( [id] => 12775771 [patent_doc_number] => 20180150425 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-31 [patent_title] => COMMUNICATION SYSTEM, COMMUNICATION SYSTEM CONTROL METHOD, AND PROGRAM [patent_app_type] => utility [patent_app_number] => 15/879728 [patent_app_country] => US [patent_app_date] => 2018-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11301 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15879728 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/879728
Communication system, communication system control method, and program Jan 24, 2018 Issued
Array ( [id] => 14629149 [patent_doc_number] => 20190227942 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-25 [patent_title] => System and Method to Handle I/O Page Faults in an I/O Memory Management Unit [patent_app_type] => utility [patent_app_number] => 15/879080 [patent_app_country] => US [patent_app_date] => 2018-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4941 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15879080 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/879080
System and Method to Handle I/O Page Faults in an I/O Memory Management Unit Jan 23, 2018 Abandoned
Array ( [id] => 14669485 [patent_doc_number] => 10372644 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-08-06 [patent_title] => Programmable controller [patent_app_type] => utility [patent_app_number] => 15/877507 [patent_app_country] => US [patent_app_date] => 2018-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 16 [patent_no_of_words] => 3197 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15877507 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/877507
Programmable controller Jan 22, 2018 Issued
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