
Ryan Johnson
Examiner (ID: 12089)
| Most Active Art Unit | 2849 |
| Art Unit(s) | 2817, 2843, 2849, 2842, 2836 |
| Total Applications | 1604 |
| Issued Applications | 1323 |
| Pending Applications | 83 |
| Abandoned Applications | 220 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 271080
[patent_doc_number] => 07564317
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-07-21
[patent_title] => 'High/low voltage tolerant interface circuit and crystal oscillator circuit'
[patent_app_type] => utility
[patent_app_number] => 11/773966
[patent_app_country] => US
[patent_app_date] => 2007-07-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 8
[patent_no_of_words] => 4690
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 185
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/564/07564317.pdf
[firstpage_image] =>[orig_patent_app_number] => 11773966
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/773966 | High/low voltage tolerant interface circuit and crystal oscillator circuit | Jul 5, 2007 | Issued |
Array
(
[id] => 5229783
[patent_doc_number] => 20070291890
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-12-20
[patent_title] => 'System On Chip For Digital Control Of Electronic Power Devices'
[patent_app_type] => utility
[patent_app_number] => 11/764202
[patent_app_country] => US
[patent_app_date] => 2007-06-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 18
[patent_no_of_words] => 18641
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0291/20070291890.pdf
[firstpage_image] =>[orig_patent_app_number] => 11764202
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/764202 | Digital PLL for a system-on-chip for digital control of electronic power devices | Jun 16, 2007 | Issued |
Array
(
[id] => 4796693
[patent_doc_number] => 20080008279
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-01-10
[patent_title] => 'METHOD AND APPARATUS FOR DISTRIBUTING CLOCK SIGNAL USING STANDING WAVES'
[patent_app_type] => utility
[patent_app_number] => 11/755797
[patent_app_country] => US
[patent_app_date] => 2007-05-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 2159
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
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[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0008/20080008279.pdf
[firstpage_image] =>[orig_patent_app_number] => 11755797
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/755797 | Method and apparatus for distributing clock signal using standing waves | May 30, 2007 | Issued |
Array
(
[id] => 4789982
[patent_doc_number] => 20080290955
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-11-27
[patent_title] => 'LOW COST AND LOW VARIATION OSCILLATOR'
[patent_app_type] => utility
[patent_app_number] => 11/753262
[patent_app_country] => US
[patent_app_date] => 2007-05-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3198
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0290/20080290955.pdf
[firstpage_image] =>[orig_patent_app_number] => 11753262
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/753262 | Low cost and low variation oscillator | May 23, 2007 | Issued |
Array
(
[id] => 6582669
[patent_doc_number] => 20100000648
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-01-07
[patent_title] => 'PNEUMATIC TIRE'
[patent_app_type] => utility
[patent_app_number] => 12/293523
[patent_app_country] => US
[patent_app_date] => 2007-05-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 7797
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0000/20100000648.pdf
[firstpage_image] =>[orig_patent_app_number] => 12293523
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/293523 | Pneumatic tire | May 22, 2007 | Issued |
Array
(
[id] => 5060889
[patent_doc_number] => 20070222528
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-09-27
[patent_title] => 'Multi-terminal harmonic oscillator integrated circuit with frequency calibration and frequency configuration'
[patent_app_type] => utility
[patent_app_number] => 11/805368
[patent_app_country] => US
[patent_app_date] => 2007-05-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 46
[patent_figures_cnt] => 46
[patent_no_of_words] => 49718
[patent_no_of_claims] => 93
[patent_no_of_ind_claims] => 5
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[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0222/20070222528.pdf
[firstpage_image] =>[orig_patent_app_number] => 11805368
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/805368 | Multi-terminal harmonic oscillator integrated circuit with frequency calibration and frequency configuration | May 22, 2007 | Issued |
Array
(
[id] => 205665
[patent_doc_number] => 07629859
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-12-08
[patent_title] => 'Integrated resonance circuit'
[patent_app_type] => utility
[patent_app_number] => 11/798917
[patent_app_country] => US
[patent_app_date] => 2007-05-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 4339
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 105
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/629/07629859.pdf
[firstpage_image] =>[orig_patent_app_number] => 11798917
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/798917 | Integrated resonance circuit | May 16, 2007 | Issued |
Array
(
[id] => 5026561
[patent_doc_number] => 20070268007
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-11-22
[patent_title] => 'Integrated tunable resonance circuit'
[patent_app_type] => utility
[patent_app_number] => 11/798918
[patent_app_country] => US
[patent_app_date] => 2007-05-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 5227
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0268/20070268007.pdf
[firstpage_image] =>[orig_patent_app_number] => 11798918
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/798918 | Integrated tunable resonance circuit | May 16, 2007 | Issued |
Array
(
[id] => 4776532
[patent_doc_number] => 20080284530
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-11-20
[patent_title] => 'PHASE NOISE MINIMIZED PHASE/FREQUENCY-LOCKED VOLTAGE-CONTROLLED OSCILLATOR CIRCUIT'
[patent_app_type] => utility
[patent_app_number] => 11/747927
[patent_app_country] => US
[patent_app_date] => 2007-05-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 3440
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0284/20080284530.pdf
[firstpage_image] =>[orig_patent_app_number] => 11747927
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/747927 | PHASE NOISE MINIMIZED PHASE/FREQUENCY-LOCKED VOLTAGE-CONTROLLED OSCILLATOR CIRCUIT | May 13, 2007 | Abandoned |
Array
(
[id] => 5210814
[patent_doc_number] => 20070249398
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-10-25
[patent_title] => 'Semiconductor integrated circuit and non-contact electronic device using the same'
[patent_app_type] => utility
[patent_app_number] => 11/785723
[patent_app_country] => US
[patent_app_date] => 2007-04-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 7929
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
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[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0249/20070249398.pdf
[firstpage_image] =>[orig_patent_app_number] => 11785723
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/785723 | Semiconductor integrated circuit and non-contact electronic device using the same | Apr 18, 2007 | Issued |
Array
(
[id] => 4716043
[patent_doc_number] => 20080238565
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-10-02
[patent_title] => 'OSCILLATOR CIRCUIT WITH TRANSITION DETECTION ENABLE'
[patent_app_type] => utility
[patent_app_number] => 11/695010
[patent_app_country] => US
[patent_app_date] => 2007-03-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 4552
[patent_no_of_claims] => 25
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0238/20080238565.pdf
[firstpage_image] =>[orig_patent_app_number] => 11695010
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/695010 | Oscillator circuit with transition detection enable | Mar 30, 2007 | Issued |
Array
(
[id] => 4716042
[patent_doc_number] => 20080238564
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-10-02
[patent_title] => 'METHOD FOR ENABLING AN OSCILLATOR CIRCUIT USING TRANSITION DETECTION'
[patent_app_type] => utility
[patent_app_number] => 11/695009
[patent_app_country] => US
[patent_app_date] => 2007-03-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[patent_no_of_words] => 4371
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[pdf_file] => publications/A1/0238/20080238564.pdf
[firstpage_image] =>[orig_patent_app_number] => 11695009
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/695009 | Method for enabling an oscillator circuit using transition detection | Mar 30, 2007 | Issued |
Array
(
[id] => 103569
[patent_doc_number] => 07728675
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2010-06-01
[patent_title] => 'Fast lock circuit for a phase lock loop'
[patent_app_type] => utility
[patent_app_number] => 11/731606
[patent_app_country] => US
[patent_app_date] => 2007-03-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 8
[patent_no_of_words] => 4961
[patent_no_of_claims] => 19
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/728/07728675.pdf
[firstpage_image] =>[orig_patent_app_number] => 11731606
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/731606 | Fast lock circuit for a phase lock loop | Mar 28, 2007 | Issued |
Array
(
[id] => 4488338
[patent_doc_number] => 07946185
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-05-24
[patent_title] => 'Converter pulse width shaping circuit and excessive vortex flow rate meter'
[patent_app_type] => utility
[patent_app_number] => 12/087368
[patent_app_country] => US
[patent_app_date] => 2007-03-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
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[patent_no_of_words] => 3451
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/946/07946185.pdf
[firstpage_image] =>[orig_patent_app_number] => 12087368
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/087368 | Converter pulse width shaping circuit and excessive vortex flow rate meter | Mar 25, 2007 | Issued |
Array
(
[id] => 4737694
[patent_doc_number] => 20080231346
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-09-25
[patent_title] => 'CHARGE PUMP CIRCUIT WITH DYNAMIC CURENT BIASING FOR PHASE LOCKED LOOP'
[patent_app_type] => utility
[patent_app_number] => 11/690835
[patent_app_country] => US
[patent_app_date] => 2007-03-25
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0231/20080231346.pdf
[firstpage_image] =>[orig_patent_app_number] => 11690835
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/690835 | Charge pump circuit with dynamic current biasing for phase locked loop | Mar 24, 2007 | Issued |
Array
(
[id] => 4737726
[patent_doc_number] => 20080231378
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-09-25
[patent_title] => 'RING OSCILLATOR WITH ULTRA-WIDE FREQUENCY TUNING RANGE'
[patent_app_type] => utility
[patent_app_number] => 11/689586
[patent_app_country] => US
[patent_app_date] => 2007-03-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[patent_no_of_words] => 3864
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0231/20080231378.pdf
[firstpage_image] =>[orig_patent_app_number] => 11689586
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/689586 | Ring oscillator with ultra-wide frequency tuning range | Mar 21, 2007 | Issued |
Array
(
[id] => 1077551
[patent_doc_number] => 07616068
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-11-10
[patent_title] => 'Frequency synthesizer for integrated circuit radios'
[patent_app_type] => utility
[patent_app_number] => 11/686938
[patent_app_country] => US
[patent_app_date] => 2007-03-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
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[pdf_file] => patents/07/616/07616068.pdf
[firstpage_image] =>[orig_patent_app_number] => 11686938
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/686938 | Frequency synthesizer for integrated circuit radios | Mar 14, 2007 | Issued |
Array
(
[id] => 4724617
[patent_doc_number] => 20080204158
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-08-28
[patent_title] => 'APPARATUS AND METHOD FOR GENERATING A SUPPLY VOLTAGE-DEPENDENT CLOCK SIGNAL'
[patent_app_type] => utility
[patent_app_number] => 11/685656
[patent_app_country] => US
[patent_app_date] => 2007-03-13
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0204/20080204158.pdf
[firstpage_image] =>[orig_patent_app_number] => 11685656
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/685656 | APPARATUS AND METHOD FOR GENERATING A SUPPLY VOLTAGE-DEPENDENT CLOCK SIGNAL | Mar 12, 2007 | Abandoned |
Array
(
[id] => 5353429
[patent_doc_number] => 20090184773
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-07-23
[patent_title] => 'Hybrid Pll Combining Fractional-N & Integer-N Modes of Differing Bandwidths'
[patent_app_type] => utility
[patent_app_number] => 12/224904
[patent_app_country] => US
[patent_app_date] => 2007-03-09
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0184/20090184773.pdf
[firstpage_image] =>[orig_patent_app_number] => 12224904
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/224904 | Hybrid Pll Combining Fractional-N & Integer-N Modes of Differing Bandwidths | Mar 8, 2007 | Abandoned |
Array
(
[id] => 4696092
[patent_doc_number] => 20080218276
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-09-11
[patent_title] => 'MEANS TO CONTROL PLL PHASE SLEW RATE'
[patent_app_type] => utility
[patent_app_number] => 11/681886
[patent_app_country] => US
[patent_app_date] => 2007-03-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[pdf_file] => publications/A1/0218/20080218276.pdf
[firstpage_image] =>[orig_patent_app_number] => 11681886
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/681886 | MEANS TO CONTROL PLL PHASE SLEW RATE | Mar 4, 2007 | Abandoned |