
Ryan Johnson
Examiner (ID: 7400, Phone: (571)270-1264 , Office: P/2842 )
| Most Active Art Unit | 2849 |
| Art Unit(s) | 2836, 2817, 2842, 2843, 2849 |
| Total Applications | 1609 |
| Issued Applications | 1329 |
| Pending Applications | 81 |
| Abandoned Applications | 220 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 4737726
[patent_doc_number] => 20080231378
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-09-25
[patent_title] => 'RING OSCILLATOR WITH ULTRA-WIDE FREQUENCY TUNING RANGE'
[patent_app_type] => utility
[patent_app_number] => 11/689586
[patent_app_country] => US
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[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0231/20080231378.pdf
[firstpage_image] =>[orig_patent_app_number] => 11689586
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/689586 | Ring oscillator with ultra-wide frequency tuning range | Mar 21, 2007 | Issued |
Array
(
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[patent_doc_number] => 07616068
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-11-10
[patent_title] => 'Frequency synthesizer for integrated circuit radios'
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[patent_app_country] => US
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[firstpage_image] =>[orig_patent_app_number] => 11686938
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/686938 | Frequency synthesizer for integrated circuit radios | Mar 14, 2007 | Issued |
Array
(
[id] => 4724617
[patent_doc_number] => 20080204158
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-08-28
[patent_title] => 'APPARATUS AND METHOD FOR GENERATING A SUPPLY VOLTAGE-DEPENDENT CLOCK SIGNAL'
[patent_app_type] => utility
[patent_app_number] => 11/685656
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/685656 | APPARATUS AND METHOD FOR GENERATING A SUPPLY VOLTAGE-DEPENDENT CLOCK SIGNAL | Mar 12, 2007 | Abandoned |
Array
(
[id] => 5353429
[patent_doc_number] => 20090184773
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[patent_kind] => A1
[patent_issue_date] => 2009-07-23
[patent_title] => 'Hybrid Pll Combining Fractional-N & Integer-N Modes of Differing Bandwidths'
[patent_app_type] => utility
[patent_app_number] => 12/224904
[patent_app_country] => US
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Array
(
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[patent_issue_date] => 2008-09-11
[patent_title] => 'MEANS TO CONTROL PLL PHASE SLEW RATE'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/681886 | MEANS TO CONTROL PLL PHASE SLEW RATE | Mar 4, 2007 | Abandoned |
Array
(
[id] => 186382
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/621769 | Method and apparatus to facilitate the provision and use of a plurality of varactors with a plurality of switches | Jan 9, 2007 | Issued |
Array
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[patent_issue_date] => 2008-07-10
[patent_title] => 'VOLTAGE CONTROLLED OSCILLATOR CIRCUITS AND METHODS USING VARIABLE CAPACITANCE DEGENERATION FOR INCREASED TUNING RANGE'
[patent_app_type] => utility
[patent_app_number] => 11/619765
[patent_app_country] => US
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Array
(
[id] => 5102685
[patent_doc_number] => 20070185947
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-08-09
[patent_title] => 'Frequency synthesizer'
[patent_app_type] => utility
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[patent_app_country] => US
[patent_app_date] => 2007-01-03
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Array
(
[id] => 4783204
[patent_doc_number] => 20080136533
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[patent_kind] => A1
[patent_issue_date] => 2008-06-12
[patent_title] => 'METHOD AND SYSTEM FOR FAST PLL CLOSE-LOOP SETTLING AFTER OPEN-LOOP VCO CALIBRATION'
[patent_app_type] => utility
[patent_app_number] => 11/618715
[patent_app_country] => US
[patent_app_date] => 2006-12-29
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[firstpage_image] =>[orig_patent_app_number] => 11618715
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/618715 | Method and system for fast PLL close-loop settling after open-loop VCO calibration | Dec 28, 2006 | Issued |
Array
(
[id] => 114383
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[patent_title] => 'Harmonic characterization and correction of device mismatch'
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Array
(
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[patent_title] => 'Method and system for implementing a low power, high performance fractional-N PLL'
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Array
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Array
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Array
(
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[patent_title] => 'Clock generator with reduced electromagnetic interference for DC-DC converters'
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Array
(
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/612666 | Systems and methods with reduced reference spurs using a crystal oscillator for broadband communications | Dec 18, 2006 | Issued |
Array
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Array
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Array
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Array
(
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