
Ryan Johnson
Examiner (ID: 12089)
| Most Active Art Unit | 2849 |
| Art Unit(s) | 2817, 2843, 2849, 2842, 2836 |
| Total Applications | 1604 |
| Issued Applications | 1323 |
| Pending Applications | 83 |
| Abandoned Applications | 220 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 889772
[patent_doc_number] => 07348860
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-03-25
[patent_title] => 'Triple-input relaxation oscillator with differential controllability'
[patent_app_type] => utility
[patent_app_number] => 11/332610
[patent_app_country] => US
[patent_app_date] => 2006-01-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 9
[patent_no_of_words] => 4084
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 58
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/348/07348860.pdf
[firstpage_image] =>[orig_patent_app_number] => 11332610
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/332610 | Triple-input relaxation oscillator with differential controllability | Jan 12, 2006 | Issued |
Array
(
[id] => 5670767
[patent_doc_number] => 20060176121
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-08-10
[patent_title] => 'Piezoelectric oscillator having symmetric inverter pair'
[patent_app_type] => utility
[patent_app_number] => 11/332881
[patent_app_country] => US
[patent_app_date] => 2006-01-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 5242
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0176/20060176121.pdf
[firstpage_image] =>[orig_patent_app_number] => 11332881
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/332881 | Piezoelectric oscillator having symmetric inverter pair | Jan 12, 2006 | Abandoned |
Array
(
[id] => 918761
[patent_doc_number] => 07323942
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-01-29
[patent_title] => 'Dual loop PLL, and multiplication clock generator using dual loop PLL'
[patent_app_type] => utility
[patent_app_number] => 11/320848
[patent_app_country] => US
[patent_app_date] => 2005-12-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 9441
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 126
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/323/07323942.pdf
[firstpage_image] =>[orig_patent_app_number] => 11320848
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/320848 | Dual loop PLL, and multiplication clock generator using dual loop PLL | Dec 29, 2005 | Issued |
Array
(
[id] => 191552
[patent_doc_number] => 07642866
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2010-01-05
[patent_title] => 'Circuits, systems and methods relating to a dynamic dual domino ring oscillator'
[patent_app_type] => utility
[patent_app_number] => 11/322896
[patent_app_country] => US
[patent_app_date] => 2005-12-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 28
[patent_figures_cnt] => 40
[patent_no_of_words] => 16285
[patent_no_of_claims] => 28
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 111
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/642/07642866.pdf
[firstpage_image] =>[orig_patent_app_number] => 11322896
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/322896 | Circuits, systems and methods relating to a dynamic dual domino ring oscillator | Dec 29, 2005 | Issued |
Array
(
[id] => 429201
[patent_doc_number] => 07268639
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-09-11
[patent_title] => 'Pulse width modulation circuit'
[patent_app_type] => utility
[patent_app_number] => 11/320658
[patent_app_country] => US
[patent_app_date] => 2005-12-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 11
[patent_no_of_words] => 4113
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 167
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/268/07268639.pdf
[firstpage_image] =>[orig_patent_app_number] => 11320658
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/320658 | Pulse width modulation circuit | Dec 29, 2005 | Issued |
Array
(
[id] => 4986425
[patent_doc_number] => 20070152763
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-07-05
[patent_title] => 'Voltage controlled oscillator'
[patent_app_type] => utility
[patent_app_number] => 11/323100
[patent_app_country] => US
[patent_app_date] => 2005-12-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2093
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0152/20070152763.pdf
[firstpage_image] =>[orig_patent_app_number] => 11323100
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/323100 | Voltage controlled oscillator | Dec 29, 2005 | Abandoned |
Array
(
[id] => 807684
[patent_doc_number] => 07420426
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-09-02
[patent_title] => 'Frequency modulated output clock from a digital phase locked loop'
[patent_app_type] => utility
[patent_app_number] => 11/323294
[patent_app_country] => US
[patent_app_date] => 2005-12-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2638
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 118
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/420/07420426.pdf
[firstpage_image] =>[orig_patent_app_number] => 11323294
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/323294 | Frequency modulated output clock from a digital phase locked loop | Dec 29, 2005 | Issued |
Array
(
[id] => 4986422
[patent_doc_number] => 20070152760
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-07-05
[patent_title] => 'Self-biased phased-locked loop'
[patent_app_type] => utility
[patent_app_number] => 11/321495
[patent_app_country] => US
[patent_app_date] => 2005-12-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 3351
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0152/20070152760.pdf
[firstpage_image] =>[orig_patent_app_number] => 11321495
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/321495 | Self-biased phased-locked loop | Dec 28, 2005 | Issued |
Array
(
[id] => 4986419
[patent_doc_number] => 20070152757
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-07-05
[patent_title] => 'Novel method of frequency synthesis for fast switching'
[patent_app_type] => utility
[patent_app_number] => 11/321110
[patent_app_country] => US
[patent_app_date] => 2005-12-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 4148
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0152/20070152757.pdf
[firstpage_image] =>[orig_patent_app_number] => 11321110
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/321110 | Method of frequency synthesis for fast switching | Dec 28, 2005 | Issued |
Array
(
[id] => 4986421
[patent_doc_number] => 20070152759
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-07-05
[patent_title] => 'Phase-locked loop with tunable-transfer function'
[patent_app_type] => utility
[patent_app_number] => 11/321481
[patent_app_country] => US
[patent_app_date] => 2005-12-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 2459
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0152/20070152759.pdf
[firstpage_image] =>[orig_patent_app_number] => 11321481
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/321481 | Phase-locked loop with tunable-transfer function | Dec 28, 2005 | Issued |
Array
(
[id] => 928906
[patent_doc_number] => 07315218
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2008-01-01
[patent_title] => 'Method and apparatus to center the frequency of a voltage-controlled oscillator'
[patent_app_type] => utility
[patent_app_number] => 11/321386
[patent_app_country] => US
[patent_app_date] => 2005-12-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 9233
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 114
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/315/07315218.pdf
[firstpage_image] =>[orig_patent_app_number] => 11321386
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/321386 | Method and apparatus to center the frequency of a voltage-controlled oscillator | Dec 27, 2005 | Issued |
Array
(
[id] => 5077388
[patent_doc_number] => 20070120612
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-05-31
[patent_title] => 'Phase lock loop indicator'
[patent_app_type] => utility
[patent_app_number] => 11/321768
[patent_app_country] => US
[patent_app_date] => 2005-12-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 3600
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0120/20070120612.pdf
[firstpage_image] =>[orig_patent_app_number] => 11321768
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/321768 | Phase lock loop indicator | Dec 27, 2005 | Issued |
Array
(
[id] => 5129434
[patent_doc_number] => 20070205831
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-09-06
[patent_title] => 'Phase Modulating Apparatus, Communication Device, Mobile Wireless Unit, And Phase Modulating Method'
[patent_app_type] => utility
[patent_app_number] => 10/591346
[patent_app_country] => US
[patent_app_date] => 2005-12-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 8111
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0205/20070205831.pdf
[firstpage_image] =>[orig_patent_app_number] => 10591346
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/591346 | Phase modulating apparatus, communication device, mobile wireless unit, and phase modulating method | Dec 21, 2005 | Issued |
Array
(
[id] => 5432860
[patent_doc_number] => 20090167446
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-07-02
[patent_title] => 'VOLTAGE CONTROLLED RING OSCILLATOR'
[patent_app_type] => utility
[patent_app_number] => 12/158286
[patent_app_country] => US
[patent_app_date] => 2005-12-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 7571
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0167/20090167446.pdf
[firstpage_image] =>[orig_patent_app_number] => 12158286
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/158286 | Phased locked loop circuit including voltage controlled ring oscillator | Dec 19, 2005 | Issued |
Array
(
[id] => 5612145
[patent_doc_number] => 20060114072
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-06-01
[patent_title] => 'Methods and apparatuses for changing capacitance'
[patent_app_type] => utility
[patent_app_number] => 11/289286
[patent_app_country] => US
[patent_app_date] => 2005-11-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 4844
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0114/20060114072.pdf
[firstpage_image] =>[orig_patent_app_number] => 11289286
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/289286 | Methods and apparatuses for changing capacitance | Nov 29, 2005 | Abandoned |
Array
(
[id] => 4795769
[patent_doc_number] => 20080007355
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-01-10
[patent_title] => 'Cr Oscillation Circuit and Electronic Device'
[patent_app_type] => utility
[patent_app_number] => 11/667716
[patent_app_country] => US
[patent_app_date] => 2005-11-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 7574
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0007/20080007355.pdf
[firstpage_image] =>[orig_patent_app_number] => 11667716
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/667716 | Cr Oscillation Circuit and Electronic Device | Nov 14, 2005 | Abandoned |
Array
(
[id] => 380450
[patent_doc_number] => 07310026
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-12-18
[patent_title] => 'Semiconductor integrated circuit with function to detect state of stable oscillation'
[patent_app_type] => utility
[patent_app_number] => 11/272068
[patent_app_country] => US
[patent_app_date] => 2005-11-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2771
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 76
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/310/07310026.pdf
[firstpage_image] =>[orig_patent_app_number] => 11272068
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/272068 | Semiconductor integrated circuit with function to detect state of stable oscillation | Nov 13, 2005 | Issued |
Array
(
[id] => 5612224
[patent_doc_number] => 20060114152
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-06-01
[patent_title] => 'Method to eliminate PLL lock-up during power up for high frequency synthesizer'
[patent_app_type] => utility
[patent_app_number] => 11/271343
[patent_app_country] => US
[patent_app_date] => 2005-11-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 2314
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0114/20060114152.pdf
[firstpage_image] =>[orig_patent_app_number] => 11271343
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/271343 | Method to eliminate PLL lock-up during power up for high frequency synthesizer | Nov 9, 2005 | Abandoned |
Array
(
[id] => 425686
[patent_doc_number] => 07271670
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-09-18
[patent_title] => 'CR oscillation circuit'
[patent_app_type] => utility
[patent_app_number] => 11/270597
[patent_app_country] => US
[patent_app_date] => 2005-11-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 23
[patent_no_of_words] => 5200
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 233
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/271/07271670.pdf
[firstpage_image] =>[orig_patent_app_number] => 11270597
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/270597 | CR oscillation circuit | Nov 9, 2005 | Issued |
Array
(
[id] => 7688547
[patent_doc_number] => 20070106151
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-05-10
[patent_title] => 'Resonator with adjustable capacitance for medical device'
[patent_app_type] => utility
[patent_app_number] => 11/270417
[patent_app_country] => US
[patent_app_date] => 2005-11-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 6470
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0106/20070106151.pdf
[firstpage_image] =>[orig_patent_app_number] => 11270417
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/270417 | Resonator with adjustable capacitance for medical device | Nov 8, 2005 | Issued |