Ryan M. Stiglic

Array ( [id] => 816437 [patent_doc_number] => 07415557 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-08-19 [patent_title] => 'Methods and system for providing low latency and scalable interrupt collection' [patent_app_type] => utility [patent_app_number] => 11/422479 [patent_app_country] => US [patent_app_date] => 2006-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2551 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/415/07415557.pdf [firstpage_image] =>[orig_patent_app_number] => 11422479 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5644135 [patent_doc_number] => 20060282590 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-12-14 [patent_title] => 'IMAGE FORMING DEVICE' [patent_app_type] => utility [patent_app_number] => 11/420475 [patent_app_country] => US [patent_app_date] => 2006-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3972 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0282/20060282590.pdf [firstpage_image] =>[orig_patent_app_number] => 11420475 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5044970 [patent_doc_number] => 20070263642 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-11-15 [patent_title] => 'Mechanism to flexibly support multiple device numbers on point-to-point interconnect upstream ports' [patent_app_type] => utility [patent_app_number] => 11/433018 [patent_app_country] => US [patent_app_date] => 2006-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7940 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0263/20070263642.pdf [firstpage_image] =>[orig_patent_app_number] => 11433018 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4996029 [patent_doc_number] => 20070011374 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-01-11 [patent_title] => 'Method and system for universal serial bus (USB) re-direct (USB-R) over a network' [patent_app_type] => utility [patent_app_number] => 11/416900 [patent_app_country] => US [patent_app_date] => 2006-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5887 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0011/20070011374.pdf [firstpage_image] =>[orig_patent_app_number] => 11416900 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4956434 [patent_doc_number] => 20080189458 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-07 [patent_title] => '12C Slave Device with Programmable Write-Transaction Cycles' [patent_app_type] => utility [patent_app_number] => 11/913057 [patent_app_country] => US [patent_app_date] => 2006-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4666 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0189/20080189458.pdf [firstpage_image] =>[orig_patent_app_number] => 11913057 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4815159 [patent_doc_number] => 20080195790 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-14 [patent_title] => 'Delegating Universal Serial Bus Functionality' [patent_app_type] => utility [patent_app_number] => 11/912726 [patent_app_country] => US [patent_app_date] => 2006-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4333 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0195/20080195790.pdf [firstpage_image] =>[orig_patent_app_number] => 11912726 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5127649 [patent_doc_number] => 20070239920 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-11 [patent_title] => 'Method and system for communication between a secondary processor and an auxiliary display subsystem of a notebook' [patent_app_type] => utility [patent_app_number] => 11/398168 [patent_app_country] => US [patent_app_date] => 2006-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 9380 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0239/20070239920.pdf [firstpage_image] =>[orig_patent_app_number] => 11398168 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5540801 [patent_doc_number] => 20090222606 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-09-03 [patent_title] => 'COMMUNICATION SYSTEM AND METHOD FOR OPERATION THEREOF' [patent_app_type] => utility [patent_app_number] => 11/911173 [patent_app_country] => US [patent_app_date] => 2006-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6193 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0222/20090222606.pdf [firstpage_image] =>[orig_patent_app_number] => 11911173 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 596109 [patent_doc_number] => 07454554 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-11-18 [patent_title] => 'Binary base address search device and method' [patent_app_type] => utility [patent_app_number] => 11/395715 [patent_app_country] => US [patent_app_date] => 2006-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 11045 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/454/07454554.pdf [firstpage_image] =>[orig_patent_app_number] => 11395715 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7530004 [patent_doc_number] => 08046610 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-10-25 [patent_title] => 'Power supply control in a mobile portable device' [patent_app_type] => utility [patent_app_number] => 12/159583 [patent_app_country] => US [patent_app_date] => 2006-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2865 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/046/08046610.pdf [firstpage_image] =>[orig_patent_app_number] => 12159583 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7687867 [patent_doc_number] => 20070106831 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-05-10 [patent_title] => 'Computer system and bridge module thereof' [patent_app_type] => utility [patent_app_number] => 11/378389 [patent_app_country] => US [patent_app_date] => 2006-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3644 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0106/20070106831.pdf [firstpage_image] =>[orig_patent_app_number] => 11378389 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5121805 [patent_doc_number] => 20070143520 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-06-21 [patent_title] => 'Bridge, computer system and method for initialization' [patent_app_type] => utility [patent_app_number] => 11/378386 [patent_app_country] => US [patent_app_date] => 2006-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6768 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0143/20070143520.pdf [firstpage_image] =>[orig_patent_app_number] => 11378386 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 332895 [patent_doc_number] => 07512731 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-03-31 [patent_title] => 'Computer system and memory bridge for processor socket thereof' [patent_app_type] => utility [patent_app_number] => 11/378387 [patent_app_country] => US [patent_app_date] => 2006-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 4233 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/512/07512731.pdf [firstpage_image] =>[orig_patent_app_number] => 11378387 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5418047 [patent_doc_number] => 20090043934 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-02-12 [patent_title] => 'Method of and a System for Controlling Access to a Shared Resource' [patent_app_type] => utility [patent_app_number] => 11/885182 [patent_app_country] => US [patent_app_date] => 2006-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 10831 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0043/20090043934.pdf [firstpage_image] =>[orig_patent_app_number] => 11885182 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 268535 [patent_doc_number] => 07568064 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-07-28 [patent_title] => 'Packet-oriented communication in reconfigurable circuit(s)' [patent_app_type] => utility [patent_app_number] => 11/358338 [patent_app_country] => US [patent_app_date] => 2006-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 4693 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/568/07568064.pdf [firstpage_image] =>[orig_patent_app_number] => 11358338 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 79258 [patent_doc_number] => 07752363 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-07-06 [patent_title] => 'Signal generating circuit and related method for activating physical channel between host and peripheral device' [patent_app_type] => utility [patent_app_number] => 11/307046 [patent_app_country] => US [patent_app_date] => 2006-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4567 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/752/07752363.pdf [firstpage_image] =>[orig_patent_app_number] => 11307046 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4990601 [patent_doc_number] => 20070156942 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-07-05 [patent_title] => 'Method and apparatus for independently managing a chipset-integrated bus controller' [patent_app_type] => utility [patent_app_number] => 11/322682 [patent_app_country] => US [patent_app_date] => 2005-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6415 [patent_no_of_claims] => 52 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0156/20070156942.pdf [firstpage_image] =>[orig_patent_app_number] => 11322682 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 27230 [patent_doc_number] => 07802040 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-09-21 [patent_title] => 'Arbitration method reordering transactions to ensure quality of service specified by each transaction' [patent_app_type] => utility [patent_app_number] => 12/086244 [patent_app_country] => US [patent_app_date] => 2005-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 8906 [patent_no_of_claims] => 47 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/802/07802040.pdf [firstpage_image] =>[orig_patent_app_number] => 12086244 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5879077 [patent_doc_number] => 20060168385 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-27 [patent_title] => 'Interrupt controller for a microprocessor' [patent_app_type] => utility [patent_app_number] => 11/300801 [patent_app_country] => US [patent_app_date] => 2005-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4671 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0168/20060168385.pdf [firstpage_image] =>[orig_patent_app_number] => 11300801 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5915942 [patent_doc_number] => 20060129653 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-15 [patent_title] => 'Support identification device' [patent_app_type] => utility [patent_app_number] => 11/296451 [patent_app_country] => US [patent_app_date] => 2005-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3258 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0129/20060129653.pdf [firstpage_image] =>[orig_patent_app_number] => 11296451 [rel_patent_id] =>[rel_patent_doc_number] =>)