
Ryan M. Stiglic
Examiner (ID: 11234)
| Most Active Art Unit | 2111 |
| Art Unit(s) | 2112, OPQA, 2111, 2185, 6213 |
| Total Applications | 588 |
| Issued Applications | 426 |
| Pending Applications | 9 |
| Abandoned Applications | 155 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 7038045
[patent_doc_number] => 20050157479
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-07-21
[patent_title] => 'Bus device insertion and removal system'
[patent_app_type] => utility
[patent_app_number] => 10/759819
[patent_app_country] => US
[patent_app_date] => 2004-01-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 6206
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0157/20050157479.pdf
[firstpage_image] =>[orig_patent_app_number] => 10759819
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/759819 | Bus device insertion and removal system | Jan 15, 2004 | Abandoned |
Array
(
[id] => 7328626
[patent_doc_number] => 20040139266
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-07-15
[patent_title] => 'Communication interface method'
[patent_app_type] => new
[patent_app_number] => 10/745885
[patent_app_country] => US
[patent_app_date] => 2003-12-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 2930
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 113
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0139/20040139266.pdf
[firstpage_image] =>[orig_patent_app_number] => 10745885
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/745885 | Communication interface method | Dec 25, 2003 | Issued |
Array
(
[id] => 6994543
[patent_doc_number] => 20050134321
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-06-23
[patent_title] => 'Interface for serial data communication'
[patent_app_type] => utility
[patent_app_number] => 10/732063
[patent_app_country] => US
[patent_app_date] => 2003-12-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3862
[patent_no_of_claims] => 31
[patent_no_of_ind_claims] => 2
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[pdf_file] => publications/A1/0134/20050134321.pdf
[firstpage_image] =>[orig_patent_app_number] => 10732063
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/732063 | Interface for serial data communication | Dec 9, 2003 | Issued |
Array
(
[id] => 7472360
[patent_doc_number] => 20040199741
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-10-07
[patent_title] => 'Operating memory components'
[patent_app_type] => new
[patent_app_number] => 10/729873
[patent_app_country] => US
[patent_app_date] => 2003-12-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3593
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 178
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0199/20040199741.pdf
[firstpage_image] =>[orig_patent_app_number] => 10729873
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/729873 | Operating memory components | Dec 4, 2003 | Issued |
Array
(
[id] => 6919768
[patent_doc_number] => 20050097255
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-05-05
[patent_title] => 'I2C device including bus switches and programmable address'
[patent_app_type] => utility
[patent_app_number] => 10/698065
[patent_app_country] => US
[patent_app_date] => 2003-10-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 6041
[patent_no_of_claims] => 27
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[pdf_file] => publications/A1/0097/20050097255.pdf
[firstpage_image] =>[orig_patent_app_number] => 10698065
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/698065 | I2C device including bus switches and programmable address | Oct 29, 2003 | Issued |
Array
(
[id] => 7300281
[patent_doc_number] => 20040215867
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-10-28
[patent_title] => 'Control chip, circuit and method thereof for inhibiting bus cycle'
[patent_app_type] => new
[patent_app_number] => 10/697773
[patent_app_country] => US
[patent_app_date] => 2003-10-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[patent_no_of_words] => 2480
[patent_no_of_claims] => 18
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0215/20040215867.pdf
[firstpage_image] =>[orig_patent_app_number] => 10697773
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/697773 | Control chip, circuit and method thereof for inhibiting bus cycle | Oct 28, 2003 | Abandoned |
Array
(
[id] => 7166712
[patent_doc_number] => 20050086413
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-04-21
[patent_title] => 'Capacity Expansion of Flash Memory Device with a Daisy-Chainable Structure and an Integrated Hub'
[patent_app_type] => utility
[patent_app_number] => 10/605636
[patent_app_country] => US
[patent_app_date] => 2003-10-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 4040
[patent_no_of_claims] => 21
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0086/20050086413.pdf
[firstpage_image] =>[orig_patent_app_number] => 10605636
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/605636 | Capacity Expansion of Flash Memory Device with a Daisy-Chainable Structure and an Integrated Hub | Oct 14, 2003 | Abandoned |
Array
(
[id] => 7245300
[patent_doc_number] => 20050080978
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-04-14
[patent_title] => 'Processor surrogate for use in multiprocessor systems and multiprocessor system using same'
[patent_app_type] => utility
[patent_app_number] => 10/683859
[patent_app_country] => US
[patent_app_date] => 2003-10-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 5005
[patent_no_of_claims] => 32
[patent_no_of_ind_claims] => 5
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[pdf_file] => publications/A1/0080/20050080978.pdf
[firstpage_image] =>[orig_patent_app_number] => 10683859
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/683859 | Processor surrogate for use in multiprocessor systems and multiprocessor system using same | Oct 9, 2003 | Issued |
Array
(
[id] => 7341083
[patent_doc_number] => 20040133695
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-07-08
[patent_title] => 'Network-storage apparatus for high-speed streaming data transmission through network'
[patent_app_type] => new
[patent_app_number] => 10/676116
[patent_app_country] => US
[patent_app_date] => 2003-10-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[patent_no_of_words] => 3963
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[pdf_file] => publications/A1/0133/20040133695.pdf
[firstpage_image] =>[orig_patent_app_number] => 10676116
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/676116 | Network-storage apparatus for high-speed streaming data transmission through network | Oct 1, 2003 | Abandoned |
Array
(
[id] => 7013442
[patent_doc_number] => 20050066106
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-03-24
[patent_title] => 'Input/output unit access switching system and method'
[patent_app_type] => utility
[patent_app_number] => 10/667074
[patent_app_country] => US
[patent_app_date] => 2003-09-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[patent_no_of_words] => 2489
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[pdf_file] => publications/A1/0066/20050066106.pdf
[firstpage_image] =>[orig_patent_app_number] => 10667074
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/667074 | Input/output unit access switching system and method | Sep 17, 2003 | Issued |
Array
(
[id] => 7162924
[patent_doc_number] => 20040076048
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-04-22
[patent_title] => 'Universal serial bus flash bay'
[patent_app_type] => new
[patent_app_number] => 10/664388
[patent_app_country] => US
[patent_app_date] => 2003-09-17
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0076/20040076048.pdf
[firstpage_image] =>[orig_patent_app_number] => 10664388
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/664388 | Universal serial bus flash bay | Sep 16, 2003 | Abandoned |
Array
(
[id] => 7282240
[patent_doc_number] => 20040064617
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-04-01
[patent_title] => 'Information processing apparatus, information processing method, recording medium and program'
[patent_app_type] => new
[patent_app_number] => 10/663422
[patent_app_country] => US
[patent_app_date] => 2003-09-16
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[pdf_file] => publications/A1/0064/20040064617.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/663422 | Information processing apparatus, information processing method, recording medium and program | Sep 15, 2003 | Issued |
Array
(
[id] => 7128974
[patent_doc_number] => 20050060456
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-03-17
[patent_title] => 'Method and apparatus for multi-port memory controller'
[patent_app_type] => utility
[patent_app_number] => 10/663328
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[firstpage_image] =>[orig_patent_app_number] => 10663328
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/663328 | Method and apparatus for multi-port memory controller | Sep 15, 2003 | Issued |
Array
(
[id] => 457851
[patent_doc_number] => 07249213
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-07-24
[patent_title] => 'Memory device operable with a plurality of protocols with configuration data stored in non-volatile storage elements'
[patent_app_type] => utility
[patent_app_number] => 10/643249
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/643249 | Memory device operable with a plurality of protocols with configuration data stored in non-volatile storage elements | Aug 17, 2003 | Issued |
Array
(
[id] => 7473817
[patent_doc_number] => 20040054832
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-03-18
[patent_title] => 'Interrupt-controller with prioity specification'
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[patent_app_number] => 10/450799
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[pdf_file] => publications/A1/0054/20040054832.pdf
[firstpage_image] =>[orig_patent_app_number] => 10450799
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/450799 | Interrupt-controller with prioity specification | Aug 14, 2003 | Abandoned |
Array
(
[id] => 684606
[patent_doc_number] => 07085867
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-08-01
[patent_title] => 'Methods and structure for SCSI2 to SCSI3 reservation protocol mapping'
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[patent_app_number] => 10/635887
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[pdf_file] => patents/07/085/07085867.pdf
[firstpage_image] =>[orig_patent_app_number] => 10635887
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/635887 | Methods and structure for SCSI2 to SCSI3 reservation protocol mapping | Aug 5, 2003 | Issued |
Array
(
[id] => 684625
[patent_doc_number] => 07085876
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-08-01
[patent_title] => 'USB controlling apparatus for data transfer between computers and method for the same'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/617722 | USB controlling apparatus for data transfer between computers and method for the same | Jul 13, 2003 | Issued |
Array
(
[id] => 7166691
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[patent_title] => 'MS silicon card with bi-interface'
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[firstpage_image] =>[orig_patent_app_number] => 10617802
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/617802 | MS silicon card with bi-interface | Jul 13, 2003 | Abandoned |
Array
(
[id] => 7091738
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[patent_title] => 'Computer apparatus and method for autonomically detecting system reconfiguration and maintaining persistent I/O bus numbering'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/616683 | Computer apparatus and method for autonomically detecting system reconfiguration and maintaining persistent I/O bus numbering | Jul 9, 2003 | Abandoned |
Array
(
[id] => 7063093
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[patent_title] => 'Memory bus assignment for functional devices in an audio/video signal processing system'
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[firstpage_image] =>[orig_patent_app_number] => 10614676
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/614676 | Memory bus assignment for functional devices in an audio/video signal processing system | Jul 3, 2003 | Issued |