Search

Ryan M. Stiglic

Examiner (ID: 12306)

Most Active Art Unit
2111
Art Unit(s)
2111, 2185, OPQA, 2112, 6213
Total Applications
591
Issued Applications
428
Pending Applications
10
Abandoned Applications
155

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7166691 [patent_doc_number] => 20050086408 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-04-21 [patent_title] => 'MS silicon card with bi-interface' [patent_app_type] => utility [patent_app_number] => 10/617802 [patent_app_country] => US [patent_app_date] => 2003-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1900 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0086/20050086408.pdf [firstpage_image] =>[orig_patent_app_number] => 10617802 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/617802
MS silicon card with bi-interface Jul 13, 2003 Abandoned
Array ( [id] => 7091738 [patent_doc_number] => 20050010705 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-13 [patent_title] => 'Computer apparatus and method for autonomically detecting system reconfiguration and maintaining persistent I/O bus numbering' [patent_app_type] => utility [patent_app_number] => 10/616683 [patent_app_country] => US [patent_app_date] => 2003-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6509 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0010/20050010705.pdf [firstpage_image] =>[orig_patent_app_number] => 10616683 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/616683
Computer apparatus and method for autonomically detecting system reconfiguration and maintaining persistent I/O bus numbering Jul 9, 2003 Abandoned
Array ( [id] => 7063093 [patent_doc_number] => 20050005050 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-06 [patent_title] => 'Memory bus assignment for functional devices in an audio/video signal processing system' [patent_app_type] => utility [patent_app_number] => 10/614676 [patent_app_country] => US [patent_app_date] => 2003-07-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5695 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0005/20050005050.pdf [firstpage_image] =>[orig_patent_app_number] => 10614676 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/614676
Memory bus assignment for functional devices in an audio/video signal processing system Jul 3, 2003 Issued
Array ( [id] => 7308853 [patent_doc_number] => 20040117527 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-06-17 [patent_title] => 'Arbitration circuit and data processing system' [patent_app_type] => new [patent_app_number] => 10/603809 [patent_app_country] => US [patent_app_date] => 2003-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9980 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0117/20040117527.pdf [firstpage_image] =>[orig_patent_app_number] => 10603809 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/603809
Arbitration circuit and data processing system Jun 25, 2003 Issued
Array ( [id] => 7417200 [patent_doc_number] => 20040107306 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-06-03 [patent_title] => 'Ordering rule controlled command storage' [patent_app_type] => new [patent_app_number] => 10/465014 [patent_app_country] => US [patent_app_date] => 2003-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4386 [patent_no_of_claims] => 61 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0107/20040107306.pdf [firstpage_image] =>[orig_patent_app_number] => 10465014 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/465014
Ordering rule controlled command storage Jun 18, 2003 Issued
Array ( [id] => 7270921 [patent_doc_number] => 20040059439 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-25 [patent_title] => 'Interrupt controller for a microprocessor' [patent_app_type] => new [patent_app_number] => 10/451350 [patent_app_country] => US [patent_app_date] => 2003-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4541 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 24 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0059/20040059439.pdf [firstpage_image] =>[orig_patent_app_number] => 10451350 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/451350
Interrupt controller for a microprocessor Jun 18, 2003 Abandoned
Array ( [id] => 7261803 [patent_doc_number] => 20040260850 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-23 [patent_title] => 'Apparatus for USB interface identification' [patent_app_type] => new [patent_app_number] => 10/462627 [patent_app_country] => US [patent_app_date] => 2003-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2248 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0260/20040260850.pdf [firstpage_image] =>[orig_patent_app_number] => 10462627 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/462627
Apparatus for USB interface identification Jun 16, 2003 Abandoned
Array ( [id] => 7333152 [patent_doc_number] => 20040255070 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-16 [patent_title] => 'Inter-integrated circuit router for supporting independent transmission rates' [patent_app_type] => new [patent_app_number] => 10/461156 [patent_app_country] => US [patent_app_date] => 2003-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 17682 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0255/20040255070.pdf [firstpage_image] =>[orig_patent_app_number] => 10461156 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/461156
Inter-integrated circuit router for supporting independent transmission rates Jun 11, 2003 Abandoned
Array ( [id] => 418112 [patent_doc_number] => 07281076 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-10-09 [patent_title] => 'Form factor converter and tester in an open architecture modular computing system' [patent_app_type] => utility [patent_app_number] => 10/427767 [patent_app_country] => US [patent_app_date] => 2003-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 8381 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/281/07281076.pdf [firstpage_image] =>[orig_patent_app_number] => 10427767 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/427767
Form factor converter and tester in an open architecture modular computing system Apr 29, 2003 Issued
Array ( [id] => 535738 [patent_doc_number] => 07191265 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-03-13 [patent_title] => 'JTAG and boundary scan automatic chain selection' [patent_app_type] => utility [patent_app_number] => 10/425388 [patent_app_country] => US [patent_app_date] => 2003-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3001 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/191/07191265.pdf [firstpage_image] =>[orig_patent_app_number] => 10425388 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/425388
JTAG and boundary scan automatic chain selection Apr 28, 2003 Issued
Array ( [id] => 637465 [patent_doc_number] => 07130951 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-10-31 [patent_title] => 'Method for selectively disabling interrupts on a secure execution mode-capable processor' [patent_app_type] => utility [patent_app_number] => 10/419091 [patent_app_country] => US [patent_app_date] => 2003-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 8923 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/130/07130951.pdf [firstpage_image] =>[orig_patent_app_number] => 10419091 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/419091
Method for selectively disabling interrupts on a secure execution mode-capable processor Apr 17, 2003 Issued
Array ( [id] => 7384552 [patent_doc_number] => 20040221086 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-11-04 [patent_title] => 'Method, apparatus and computer program product for write data transfer' [patent_app_type] => new [patent_app_number] => 10/418593 [patent_app_country] => US [patent_app_date] => 2003-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4679 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0221/20040221086.pdf [firstpage_image] =>[orig_patent_app_number] => 10418593 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/418593
Method, apparatus and computer program product for write data transfer Apr 16, 2003 Issued
Array ( [id] => 7442563 [patent_doc_number] => 20040210694 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-10-21 [patent_title] => 'Multi-level and multi-resolution bus arbitration' [patent_app_type] => new [patent_app_number] => 10/414310 [patent_app_country] => US [patent_app_date] => 2003-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4573 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0210/20040210694.pdf [firstpage_image] =>[orig_patent_app_number] => 10414310 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/414310
Multi-level and multi-resolution bus arbitration Apr 15, 2003 Issued
Array ( [id] => 7352502 [patent_doc_number] => 20040193771 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-30 [patent_title] => 'Method, apparatus, and system for processing a plurality of outstanding data requests' [patent_app_type] => new [patent_app_number] => 10/401574 [patent_app_country] => US [patent_app_date] => 2003-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3878 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0193/20040193771.pdf [firstpage_image] =>[orig_patent_app_number] => 10401574 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/401574
Method, apparatus, and system for processing a plurality of outstanding data requests Mar 30, 2003 Abandoned
Array ( [id] => 706617 [patent_doc_number] => 07065595 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-06-20 [patent_title] => 'Method and apparatus for bus access allocation' [patent_app_type] => utility [patent_app_number] => 10/249271 [patent_app_country] => US [patent_app_date] => 2003-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 5513 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/065/07065595.pdf [firstpage_image] =>[orig_patent_app_number] => 10249271 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/249271
Method and apparatus for bus access allocation Mar 26, 2003 Issued
Array ( [id] => 7352329 [patent_doc_number] => 20040193736 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-30 [patent_title] => 'Expedited completion done messages, method and apparatus' [patent_app_type] => new [patent_app_number] => 10/396969 [patent_app_country] => US [patent_app_date] => 2003-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4170 [patent_no_of_claims] => 71 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0193/20040193736.pdf [firstpage_image] =>[orig_patent_app_number] => 10396969 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/396969
Expedited completion done messages, method and apparatus Mar 25, 2003 Issued
Array ( [id] => 785974 [patent_doc_number] => 06993617 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-01-31 [patent_title] => 'System-on-a-chip having an on-chip processor and an on-chip dynamic random access memory (DRAM)' [patent_app_type] => utility [patent_app_number] => 10/393865 [patent_app_country] => US [patent_app_date] => 2003-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 20 [patent_no_of_words] => 4085 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 398 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/993/06993617.pdf [firstpage_image] =>[orig_patent_app_number] => 10393865 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/393865
System-on-a-chip having an on-chip processor and an on-chip dynamic random access memory (DRAM) Mar 20, 2003 Issued
Array ( [id] => 6822879 [patent_doc_number] => 20030221040 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-11-27 [patent_title] => 'Data transfer system' [patent_app_type] => new [patent_app_number] => 10/391184 [patent_app_country] => US [patent_app_date] => 2003-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2417 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0221/20030221040.pdf [firstpage_image] =>[orig_patent_app_number] => 10391184 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/391184
Data transfer system Mar 18, 2003 Abandoned
Array ( [id] => 736018 [patent_doc_number] => 07043594 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-05-09 [patent_title] => 'Local bus bridge' [patent_app_type] => utility [patent_app_number] => 10/391024 [patent_app_country] => US [patent_app_date] => 2003-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 51 [patent_figures_cnt] => 70 [patent_no_of_words] => 22189 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/043/07043594.pdf [firstpage_image] =>[orig_patent_app_number] => 10391024 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/391024
Local bus bridge Mar 18, 2003 Issued
Array ( [id] => 7205017 [patent_doc_number] => 20050165737 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-07-28 [patent_title] => 'Information processing apparatus' [patent_app_type] => utility [patent_app_number] => 10/508153 [patent_app_country] => US [patent_app_date] => 2003-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 14247 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0165/20050165737.pdf [firstpage_image] =>[orig_patent_app_number] => 10508153 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/508153
Information processing apparatus Mar 17, 2003 Abandoned
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